From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Huang Ying <ying.huang@intel.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Li Ming <ming4.li@intel.com>, <linux-kernel@vger.kernel.org>,
<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH 3/3] cxl/test: Simulate an x86 Low Memory Hole for tests
Date: Tue, 26 Nov 2024 15:00:44 +0000 [thread overview]
Message-ID: <20241126150044.0000273b@huawei.com> (raw)
In-Reply-To: <20241122155226.2068287-4-fabio.m.de.francesco@linux.intel.com>
On Fri, 22 Nov 2024 16:51:54 +0100
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com> wrote:
> Simulate an x86 Low Memory Hole for the CXL tests by changing
> mock_cfmws[0] range size to 768MB and CXL Endpoint Decoder HPA range size
> to 1GB and have get_cfmws_range_start() return two different addresses
> which depend on whether the passed device is real or mock.
>
> Cc: Alison Schofield <alison.schofield@intel.com>
> Cc: Dan Williams <dan.j.williams@intel.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index 050725afa45d..b61c3d78fed3 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -212,7 +212,7 @@ static struct {
> .restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |
> ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,
> .qtg_id = FAKE_QTG_ID,
> - .window_size = SZ_256M * 4UL,
> + .window_size = SZ_256M * 3UL,
This is changing the test whether or not we have ARCH_LOW_MEMORY_HOLE.
Doesn't that result in failures on arm64 etc?
Jonathan
> },
> .target = { 0 },
> },
> @@ -744,7 +744,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
> struct cxl_endpoint_decoder *cxled;
> struct cxl_switch_decoder *cxlsd;
> struct cxl_port *port, *iter;
> - const int size = SZ_512M;
> + const int size = SZ_1G;
> struct cxl_memdev *cxlmd;
> struct cxl_dport *dport;
> struct device *dev;
next prev parent reply other threads:[~2024-11-26 15:00 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-22 15:51 [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole Fabio M. De Francesco
2024-11-22 15:51 ` [PATCH 1/3] cxl/core: Change match_*_by_range() calling convention Fabio M. De Francesco
2024-11-22 17:28 ` Ira Weiny
2024-11-25 21:10 ` Alison Schofield
2024-11-22 15:51 ` [PATCH 2/3] cxl/core: Enable Region creation on x86 with Low Memory Hole Fabio M. De Francesco
2024-11-22 17:25 ` Ira Weiny
2024-11-25 11:23 ` Li Ming
2024-11-25 8:41 ` kernel test robot
2024-11-25 8:42 ` Li Ming
2024-11-25 17:22 ` Fabio M. De Francesco
2024-11-26 2:13 ` Li Ming
2024-11-25 13:37 ` kernel test robot
2024-11-25 20:35 ` Alison Schofield
2024-11-25 22:44 ` kernel test robot
2024-12-16 21:30 ` Robert Richter
2025-01-08 14:48 ` Fabio M. De Francesco
2025-01-09 10:58 ` Robert Richter
2025-01-10 16:06 ` Fabio M. De Francesco
2024-11-22 15:51 ` [PATCH 3/3] cxl/test: Simulate an x86 Low Memory Hole for tests Fabio M. De Francesco
2024-11-22 17:26 ` Ira Weiny
2024-11-25 20:46 ` Alison Schofield
2024-11-26 15:00 ` Jonathan Cameron [this message]
2024-11-22 19:46 ` [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole Gregory Price
2024-11-25 22:00 ` Alison Schofield
2024-12-03 18:23 ` Fabio M. De Francesco
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