From: Rob Herring <robh@kernel.org>
To: Christian Marangi <ansuelsmth@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, upstream@airoha.com
Subject: Re: [PATCH v4 1/2] dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq
Date: Mon, 2 Dec 2024 14:57:38 -0600 [thread overview]
Message-ID: <20241202205738.GA3149730-robh@kernel.org> (raw)
In-Reply-To: <674dd60f.7b0a0220.2ba255.7b7a@mx.google.com>
On Mon, Dec 02, 2024 at 04:45:17PM +0100, Christian Marangi wrote:
> On Mon, Dec 02, 2024 at 04:42:33PM +0100, Ulf Hansson wrote:
> > On Mon, 2 Dec 2024 at 16:20, Christian Marangi <ansuelsmth@gmail.com> wrote:
> > >
> > > Document required property for Airoha EN7581 CPUFreq .
> > >
> > > On newer Airoha SoC, CPU Frequency is scaled indirectly with SMCCC commands
> > > to ATF and no clocks are exposed to the OS.
> > >
> > > The SoC have performance state described by ID for each OPP, for this a
> > > Power Domain is used that sets the performance state ID according to the
> > > required OPPs defined in the CPU OPP tables.
> > >
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > ---
> > > Changes v4:
> > > - Add this patch
> > >
> > > .../cpufreq/airoha,en7581-cpufreq.yaml | 259 ++++++++++++++++++
> > > 1 file changed, 259 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> > > new file mode 100644
> > > index 000000000000..a5bdea7f34b5
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
> >
> > [...]
> >
> > > +examples:
> > > + - |
> > > + / {
> > > + #address-cells = <2>;
> > > + #size-cells = <2>;
> > > +
> > > + cpus {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > +
> > > + cpu0: cpu@0 {
> > > + device_type = "cpu";
> > > + compatible = "arm,cortex-a53";
> > > + reg = <0x0>;
> > > + operating-points-v2 = <&cpu_opp_table>;
> > > + enable-method = "psci";
> > > + clocks = <&cpufreq>;
> > > + clock-names = "cpu";
> > > + power-domains = <&cpufreq>;
> > > + power-domain-names = "cpu_pd";
> >
> > Nitpick: Perhaps clarify the name to be "perf" or "cpu_perf", to
> > indicate it's a power-domain with performance scaling support.
> >
>
> Will change to cpu_perf. Thanks a lot for the review!
Is that defined in arm/cpus.yaml? No.
The current choices are perf or psci though those aren't enforced (yet).
Or nothing which is my preference if there is only 1 power domain.
Rob
next prev parent reply other threads:[~2024-12-02 20:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-02 15:12 [PATCH v4 1/2] dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq Christian Marangi
2024-12-02 15:12 ` [PATCH v4 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver Christian Marangi
2024-12-02 20:38 ` Uwe Kleine-König
2024-12-02 20:47 ` Christian Marangi
2024-12-03 7:44 ` Uwe Kleine-König
2024-12-02 15:42 ` [PATCH v4 1/2] dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq Ulf Hansson
2024-12-02 15:45 ` Christian Marangi
2024-12-02 20:57 ` Rob Herring [this message]
2024-12-02 20:59 ` Christian Marangi
2024-12-03 10:36 ` Ulf Hansson
2024-12-03 10:33 ` Ulf Hansson
2024-12-03 10:47 ` Christian Marangi
2024-12-03 10:50 ` Viresh Kumar
2024-12-02 16:16 ` Rob Herring (Arm)
2024-12-03 4:41 ` Viresh Kumar
2024-12-03 10:22 ` Ulf Hansson
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