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From: kernel test robot <lkp@intel.com>
To: Xu Lu <luxu.kernel@bytedance.com>,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu
Cc: oe-kbuild-all@lists.linux.dev, lihangjing@bytedance.com,
	xieyongji@bytedance.com, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, Xu Lu <luxu.kernel@bytedance.com>
Subject: Re: [PATCH] riscv: mm: Fix alignment of phys_ram_base
Date: Tue, 3 Dec 2024 00:15:30 +0800	[thread overview]
Message-ID: <202412022337.YEieoR2g-lkp@intel.com> (raw)
In-Reply-To: <20241202101601.48284-1-luxu.kernel@bytedance.com>

Hi Xu,

kernel test robot noticed the following build errors:

[auto build test ERROR on linus/master]
[also build test ERROR on v6.13-rc1 next-20241128]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Xu-Lu/riscv-mm-Fix-alignment-of-phys_ram_base/20241202-183801
base:   linus/master
patch link:    https://lore.kernel.org/r/20241202101601.48284-1-luxu.kernel%40bytedance.com
patch subject: [PATCH] riscv: mm: Fix alignment of phys_ram_base
config: riscv-allnoconfig (https://download.01.org/0day-ci/archive/20241202/202412022337.YEieoR2g-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241202/202412022337.YEieoR2g-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412022337.YEieoR2g-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from include/linux/kernel.h:27,
                    from include/linux/cpumask.h:11,
                    from arch/riscv/include/asm/processor.h:55,
                    from arch/riscv/include/asm/thread_info.h:42,
                    from include/linux/thread_info.h:60,
                    from include/asm-generic/preempt.h:5,
                    from ./arch/riscv/include/generated/asm/preempt.h:1,
                    from include/linux/preempt.h:79,
                    from include/linux/spinlock.h:56,
                    from include/linux/mmzone.h:8,
                    from include/linux/gfp.h:7,
                    from include/linux/mm.h:7,
                    from arch/riscv/mm/init.c:10:
   arch/riscv/mm/init.c: In function 'setup_bootmem':
>> arch/riscv/mm/init.c:62:41: error: 'SECTION_SIZE_BITS' undeclared (first use in this function)
      62 | #define RISCV_MEMSTART_ALIGN    (1UL << SECTION_SIZE_BITS)
         |                                         ^~~~~~~~~~~~~~~~~
   include/linux/math.h:15:46: note: in definition of macro '__round_mask'
      15 | #define __round_mask(x, y) ((__typeof__(x))((y)-1))
         |                                              ^
   arch/riscv/mm/init.c:246:33: note: in expansion of macro 'round_down'
     246 |                 phys_ram_base = round_down(memblock_start_of_DRAM(),
         |                                 ^~~~~~~~~~
   arch/riscv/mm/init.c:247:44: note: in expansion of macro 'RISCV_MEMSTART_ALIGN'
     247 |                                            RISCV_MEMSTART_ALIGN);
         |                                            ^~~~~~~~~~~~~~~~~~~~
   arch/riscv/mm/init.c:62:41: note: each undeclared identifier is reported only once for each function it appears in
      62 | #define RISCV_MEMSTART_ALIGN    (1UL << SECTION_SIZE_BITS)
         |                                         ^~~~~~~~~~~~~~~~~
   include/linux/math.h:15:46: note: in definition of macro '__round_mask'
      15 | #define __round_mask(x, y) ((__typeof__(x))((y)-1))
         |                                              ^
   arch/riscv/mm/init.c:246:33: note: in expansion of macro 'round_down'
     246 |                 phys_ram_base = round_down(memblock_start_of_DRAM(),
         |                                 ^~~~~~~~~~
   arch/riscv/mm/init.c:247:44: note: in expansion of macro 'RISCV_MEMSTART_ALIGN'
     247 |                                            RISCV_MEMSTART_ALIGN);
         |                                            ^~~~~~~~~~~~~~~~~~~~


vim +/SECTION_SIZE_BITS +62 arch/riscv/mm/init.c

  > 10	#include <linux/mm.h>
    11	#include <linux/memblock.h>
    12	#include <linux/initrd.h>
    13	#include <linux/swap.h>
    14	#include <linux/swiotlb.h>
    15	#include <linux/sizes.h>
    16	#include <linux/of_fdt.h>
    17	#include <linux/of_reserved_mem.h>
    18	#include <linux/libfdt.h>
    19	#include <linux/set_memory.h>
    20	#include <linux/dma-map-ops.h>
    21	#include <linux/crash_dump.h>
    22	#include <linux/hugetlb.h>
    23	#ifdef CONFIG_RELOCATABLE
    24	#include <linux/elf.h>
    25	#endif
    26	#include <linux/kfence.h>
    27	#include <linux/execmem.h>
    28	
    29	#include <asm/fixmap.h>
    30	#include <asm/io.h>
    31	#include <asm/kasan.h>
    32	#include <asm/numa.h>
    33	#include <asm/pgtable.h>
    34	#include <asm/sections.h>
    35	#include <asm/soc.h>
    36	#include <asm/tlbflush.h>
    37	
    38	#include "../kernel/head.h"
    39	
    40	u64 new_vmalloc[NR_CPUS / sizeof(u64) + 1];
    41	
    42	struct kernel_mapping kernel_map __ro_after_init;
    43	EXPORT_SYMBOL(kernel_map);
    44	#ifdef CONFIG_XIP_KERNEL
    45	#define kernel_map	(*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
    46	#endif
    47	
    48	#ifdef CONFIG_64BIT
    49	u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
    50	#else
    51	u64 satp_mode __ro_after_init = SATP_MODE_32;
    52	#endif
    53	EXPORT_SYMBOL(satp_mode);
    54	
    55	#ifdef CONFIG_64BIT
    56	bool pgtable_l4_enabled __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL);
    57	bool pgtable_l5_enabled __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL);
    58	EXPORT_SYMBOL(pgtable_l4_enabled);
    59	EXPORT_SYMBOL(pgtable_l5_enabled);
    60	#endif
    61	
  > 62	#define RISCV_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
    63	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

  reply	other threads:[~2024-12-02 16:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-02 10:16 [PATCH] riscv: mm: Fix alignment of phys_ram_base Xu Lu
2024-12-02 16:15 ` kernel test robot [this message]
2024-12-03 11:49 ` Björn Töpel
2024-12-03 13:37   ` [External] " Xu Lu

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