drivers/phy/freescale/phy-fsl-samsung-hdmi.c:472:3-9: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead.

kernel test robot
2024-12-09T05:09:48Z

tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
commit: 1951dbb41d1dff7c135eed4fa1a6330df6971549 phy: freescale: fsl-samsung-hdmi: Support dynamic integer
date: 8 weeks ago
config: alpha-randconfig-r064-20241209 (https://download.01.org/0day-ci/archive/20241209/202412091243.fSObwwPi-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 14.2.0

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412091243.fSObwwPi-lkp@intel.com/

cocci warnings: (new ones prefixed by >>)
>> drivers/phy/freescale/phy-fsl-samsung-hdmi.c:472:3-9: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead.

vim +472 drivers/phy/freescale/phy-fsl-samsung-hdmi.c

435
436 static unsigned long fsl_samsung_hdmi_phy_find_pms(unsigned long fout, u8 *p, u16 *m, u8 *s)
437 {
438 unsigned long best_freq = 0;
439 u32 min_delta = 0xffffffff;
440 u8 _p, best_p;
441 u16 _m, best_m;
442 u8 _s, best_s;
443
444 /*
445 * Figure 13-78 of the reference manual states the PLL should be TMDS x 5
446 * while the TMDS_CLKO should be the PLL / 5. So to calculate the PLL,
447 * take the pix clock x 5, then return the value of the PLL / 5.
448 */
449 fout *= 5;
450
451 /* The ref manual states the values of 'P' range from 1 to 11 */
452 for (_p = 1; _p <= 11; ++_p) {
453 for (_s = 1; _s <= 16; ++_s) {
454 u64 tmp;
455 u32 delta;
456
457 /* s must be one or even */
458 if (_s > 1 && (_s & 0x01) == 1)
459 _s++;
460
461 /* _s cannot be 14 per the TRM */
462 if (_s == 14)
463 continue;
464
465 /*
466 * TODO: Ref Manual doesn't state the range of _m
467 * so this should be further refined if possible.
468 * This range was set based on the original values
469 * in the lookup table
470 */
471 tmp = (u64)fout * (_p * _s);
> 472 do_div(tmp, 24 * MHZ);
473 _m = tmp;
474 if (_m < 0x30 || _m > 0x7b)
475 continue;
476
477 /*
478 * Rev 2 of the Ref Manual states the
479 * VCO can range between 750MHz and
480 * 3GHz. The VCO is assumed to be
481 * Fvco = (M * f_ref) / P,
482 * where f_ref is 24MHz.
483 */
484 tmp = (u64)_m * 24 * MHZ;
485 do_div(tmp, _p);
486 if (tmp < 750 * MHZ ||
487 tmp > 3000 * MHZ)
488 continue;
489
490 /* Final frequency after post-divider */
491 do_div(tmp, _s);
492
493 delta = abs(fout - tmp);
494 if (delta < min_delta) {
495 best_p = _p;
496 best_s = _s;
497 best_m = _m;
498 min_delta = delta;
499 best_freq = tmp;
500 }
501 }
502 }
503
504 if (best_freq) {
505 *p = best_p;
506 *m = best_m;
507 *s = best_s;
508 }
509
510 return best_freq / 5;
511 }
512

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