From: "Michael S. Tsirkin" <mst@redhat.com>
To: Shijith Thotton <sthotton@marvell.com>
Cc: "Jason Wang" <jasowang@redhat.com>,
"virtualization@lists.linux.dev" <virtualization@lists.linux.dev>,
"dan.carpenter@linaro.org" <dan.carpenter@linaro.org>,
"Srujana Challa" <schalla@marvell.com>,
"Vamsi Krishna Attunuru" <vattunuru@marvell.com>,
"Nithin Kumar Dabilpuram" <ndabilpuram@marvell.com>,
"Jerin Jacob" <jerinj@marvell.com>,
"Xuan Zhuo" <xuanzhuo@linux.alibaba.com>,
"Eugenio Pérez" <eperezma@redhat.com>,
"Satha Koteswara Rao Kottidi" <skoteshwar@marvell.com>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 4/4] vdpa/octeon_ep: read vendor-specific PCI capability
Date: Fri, 13 Dec 2024 13:55:00 -0500 [thread overview]
Message-ID: <20241213135321-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <PH0PR18MB4425BB6DE30C3805F31D75CED9382@PH0PR18MB4425.namprd18.prod.outlook.com>
On Fri, Dec 13, 2024 at 02:20:24PM +0000, Shijith Thotton wrote:
> >>>
> >>> Added support to read the vendor-specific PCI capability to identify the
> >>> type of device being emulated.
> >>>
> >>> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
> >>> Signed-off-by: Shijith Thotton <sthotton@marvell.com>
> >>> ---
> >>> drivers/vdpa/octeon_ep/octep_vdpa.h | 20 ++++++++++++++
> >>> drivers/vdpa/octeon_ep/octep_vdpa_hw.c | 33
> >>+++++++++++++++++++++++-
> >>> drivers/vdpa/octeon_ep/octep_vdpa_main.c | 4 ++-
> >>> 3 files changed, 55 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/vdpa/octeon_ep/octep_vdpa.h
> >>b/drivers/vdpa/octeon_ep/octep_vdpa.h
> >>> index 2cadb878e679..53b020b019f7 100644
> >>> --- a/drivers/vdpa/octeon_ep/octep_vdpa.h
> >>> +++ b/drivers/vdpa/octeon_ep/octep_vdpa.h
> >>> @@ -8,6 +8,7 @@
> >>> #include <linux/pci_regs.h>
> >>> #include <linux/vdpa.h>
> >>> #include <linux/virtio_pci_modern.h>
> >>> +#include <uapi/linux/virtio_crypto.h>
> >>> #include <uapi/linux/virtio_net.h>
> >>> #include <uapi/linux/virtio_blk.h>
> >>> #include <uapi/linux/virtio_config.h>
> >>> @@ -52,6 +53,24 @@ struct octep_vring_info {
> >>> phys_addr_t notify_pa;
> >>> };
> >>>
> >>> +enum octep_pci_vndr_cfg_type {
> >>> + OCTEP_PCI_VNDR_CFG_TYPE_VIRTIO_ID,
> >>> + OCTEP_PCI_VNDR_CFG_TYPE_MAX,
> >>> +};
> >>> +
> >>> +struct octep_pci_vndr_data {
> >>> + struct virtio_pci_vndr_data hdr;
> >>> + u8 id;
> >>> + u8 bar;
> >>> + union {
> >>> + u64 data;
> >>> + struct {
> >>> + u32 offset;
> >>> + u32 length;
> >>> + };
> >>> + };
> >>> +};
> >>
> >>This seems not to be padded to a multiple of 4 bytes?
> >>
> >
> >Looks like, the structure is naturally aligned.
> >
> >struct virtio_pci_vndr_data {
> > uint8_t cap_vndr; /* 0 1 */
> > uint8_t cap_next; /* 1 1 */
> > uint8_t cap_len; /* 2 1 */
> > uint8_t cfg_type; /* 3 1 */
> > uint16_t vendor_id; /* 4 2 */
> > /* size: 6, cachelines: 1, members: 5 */
> > /* last cacheline: 6 bytes */
> >};
> >struct octep_pci_vndr_data {
> > struct virtio_pci_vndr_data hdr; /* 0 6 */
> > uint8_t id; /* 6 1 */
> > uint8_t bar; /* 7 1 */
> > union {
> > uint64_t data; /* 8 8 */
> > struct {
> > uint32_t offset; /* 8 4 */
> > uint32_t length; /* 12 4 */
> > }; /* 8 8 */
> > }; /* 8 8 */
> >
> > /* size: 16, cachelines: 1, members: 4 */
> > /* last cacheline: 16 bytes */
> >};
> >
> >I will add __attribute__((aligned(4))) to be safe.
> >
>
> Small correction, I meant __attribute__((packed, aligned(4))).
>
> Thanks,
> Shijith
Don't add packed pls, for me it means "something is not packed naturally
here". when in fact it is.
aligned is also bad, since it can add padding which creates all
kind of security issues.
If you want to be sure, add BUILD_BUG_ON and check that it is aligned
as expected.
next prev parent reply other threads:[~2024-12-13 18:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-09 15:12 [PATCH v3 1/4] vdpa/octeon_ep: enable support for multiple interrupts per device Shijith Thotton
2024-12-09 15:12 ` [PATCH v3 2/4] vdpa/octeon_ep: handle device config change events Shijith Thotton
2024-12-09 15:12 ` [PATCH v3 3/4] virtio-pci: define type and header for PCI vendor data Shijith Thotton
2024-12-13 3:55 ` Jason Wang
2024-12-13 10:45 ` Shijith Thotton
2024-12-09 15:12 ` [PATCH v3 4/4] vdpa/octeon_ep: read vendor-specific PCI capability Shijith Thotton
2024-12-13 3:57 ` Jason Wang
2024-12-13 10:44 ` Shijith Thotton
2024-12-13 14:20 ` Shijith Thotton
2024-12-13 18:55 ` Michael S. Tsirkin [this message]
2024-12-14 6:29 ` Shijith Thotton
2024-12-13 3:54 ` [PATCH v3 1/4] vdpa/octeon_ep: enable support for multiple interrupts per device Jason Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241213135321-mutt-send-email-mst@kernel.org \
--to=mst@redhat.com \
--cc=dan.carpenter@linaro.org \
--cc=eperezma@redhat.com \
--cc=jasowang@redhat.com \
--cc=jerinj@marvell.com \
--cc=linux-kernel@vger.kernel.org \
--cc=ndabilpuram@marvell.com \
--cc=schalla@marvell.com \
--cc=skoteshwar@marvell.com \
--cc=sthotton@marvell.com \
--cc=vattunuru@marvell.com \
--cc=virtualization@lists.linux.dev \
--cc=xuanzhuo@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox