From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D28F196DB1 for ; Thu, 2 Jan 2025 12:44:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735821886; cv=none; b=OlXaiahKh0t3QE8b7LhDHAdE65fxRMq7/a1SX9CtK/iMKOtnIvHkEpag/OThzWPRSgHEzIyw3qgWUso98S796wCpyGdMEPX8YedMSMdtJna7FpYUqp9bI8Z/ZMIMLwdfFNiEUCocowrhusR2G+XnzBC8zBociAJzJEk74Qzk6JE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735821886; c=relaxed/simple; bh=xxiIdqiyzyFYR7RK7DCQ0Z5qt9Q/BuvaSXPXWx6+Twc=; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=gXk0cxvQfkJ90Ltj5bLisyO4jpH4aYbjPf4p7f19y0BB6wkkR7dxizKTxdVv7vsS1jJ/otB706vcNqS/kdloNW9KvB+gczNSvuYGCaNAxoAlFoLtAXmAmX2cVQy3RN2wHCJk0ZciUgv0KMacXPPO7gkFMEi74FHef+QCPI+xD94= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=hRCAt15M; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hRCAt15M" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 502CiELj1942282 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 2 Jan 2025 06:44:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1735821854; bh=RRWDlOKxLVuwJVGYAuhv6OinjNOexfNpidHLnXMBJ38=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=hRCAt15MiakTwmCEdJCB4d0sabE5p+gGpsYVXou5a1s3b1IRBXOgTQWnhg660drSk Ru/PTQrEt8DxaNueoKagayv9f/C4BBTkygdqjsg+WkIcuIko6W7xeVuVbvAobPUq8u 3agJ1ChEQDmviYClrvLScq9zNkoJsZrTQroIpswU= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 502CiETn031291 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2025 06:44:14 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 2 Jan 2025 06:44:13 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 2 Jan 2025 06:44:13 -0600 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 502CiDK9064135; Thu, 2 Jan 2025 06:44:13 -0600 Date: Thu, 2 Jan 2025 06:44:13 -0600 From: Nishanth Menon To: Guillaume La Roque , Marc Zyngier CC: Catalin Marinas , Will Deacon , Thomas Gleixner , Tero Kristo , Santosh Shilimkar , , , , Mattijs Korpershoek , Kevin Hilman , Nicolas Frayer Subject: Re: [PATCH v4 0/2] irqchip: Kconfig: Add module support for TI inta/intr Message-ID: <20250102124413.wwbfzomjzedbqges@thinness> References: <20241224-timodules-v4-0-c5e010f58e2c@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20241224-timodules-v4-0-c5e010f58e2c@baylibre.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 20:36-20241224, Guillaume La Roque wrote: > Added module support for TI interrupt aggregator and interrupt router > drivers. Default value for both drivers is ARCH_K3 and the interrupt > aggregator depends on ARCH_K3 as it contains 64 bit only ops. > Tested allmodconfig builds with ARCH=arm and ARCH=arm64. > > Changes in v4: > - Rework commit message and title > - Add depends on in Kconfig frivers > - Link to v3: https://lore.kernel.org/r/20241016-timodules-v3-0-fa71091ade98@baylibre.com > > Changes in v3: > - Add MODULE_LICENSE in drivers > > Changes in v2: > - Added depends on ARCH_K3 for the interrupt aggregator driver as it > uses > 64 bit ops > > Signed-off-by: Guillaume La Roque > --- > Nicolas Frayer (2): > irqchip/ti-sci-intr: add module build support > irqchip/ti-sci-inta : Add module build support > > arch/arm64/Kconfig.platforms | 2 -- > drivers/irqchip/Kconfig | 6 ++++-- > drivers/irqchip/irq-ti-sci-inta.c | 1 + > drivers/irqchip/irq-ti-sci-intr.c | 1 + > 4 files changed, 6 insertions(+), 4 deletions(-) > --- > base-commit: 8faabc041a001140564f718dabe37753e88b37fa > change-id: 20241016-timodules-174770215dd8 > > Best regards, > -- > Guillaume La Roque > Reviewed-by: Nishanth Menon Marc, Can this go via your tree? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D