Re: [PATCH 5/5] clk: meson: t7: add t7 clock peripherals controller driver

[kernel test robot <lkp@intel.com>]

Hi Jian,

kernel test robot noticed the following build warnings:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on linus/master v6.13-rc5 next-20241220]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jian-Hu/dt-bindings-clock-add-Amlogic-T7-PLL-clock-controller/20241231-141835
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20241231060047.2298871-6-jian.hu%40amlogic.com
patch subject: [PATCH 5/5] clk: meson: t7: add t7 clock peripherals controller driver
config: arm64-randconfig-r112-20250105 (https://download.01.org/0day-ci/archive/20250106/202501060104.R3FJGgmC-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce: (https://download.01.org/0day-ci/archive/20250106/202501060104.R3FJGgmC-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501060104.R3FJGgmC-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/clk/meson/t7-peripherals.c:1276:26: sparse: sparse: Initializer entry defined twice
   drivers/clk/meson/t7-peripherals.c:1277:26: sparse:   also defined here

vim +1276 drivers/clk/meson/t7-peripherals.c

  1262	
  1263	 static u32 eth_rmii_table[] = { 0, 7 };
  1264	
  1265	static struct clk_regmap eth_rmii_sel = {
  1266		.data = &(struct clk_regmap_mux_data) {
  1267			.offset = CLKCTRL_ETH_CLK_CTRL,
  1268			.mask = 0x3,
  1269			.shift = 9,
  1270			.table = eth_rmii_table
  1271		},
  1272		.hw.init = &(struct clk_init_data){
  1273			.name = "eth_rmii_sel",
  1274			.ops = &clk_regmap_mux_ops,
  1275			.parent_data = &(const struct clk_parent_data) {
> 1276				.fw_name = "fdiv2",
  1277				.fw_name = "rmii_pad"
  1278			},
  1279			.num_parents = 2
  1280		},
  1281	};
  1282	

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