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From: Charles Keepax <ckeepax@opensource.cirrus.com>
To: <broonie@kernel.org>, <vkoul@kernel.org>, <oder_chiou@realtek.com>
Cc: <jack.yu@realtek.com>, <shumingf@realtek.com>,
	<lgirdwood@gmail.com>, <peter.ujfalusi@linux.intel.com>,
	<yung-chuan.liao@linux.intel.com>, <sanyog.r.kale@intel.com>,
	<pierre-louis.bossart@linux.dev>, <linux-sound@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <patches@opensource.cirrus.com>
Subject: [PATCH v2 1/6] soundwire: SDCA: Add additional SDCA address macros
Date: Tue, 7 Jan 2025 15:44:03 +0000	[thread overview]
Message-ID: <20250107154408.814455-2-ckeepax@opensource.cirrus.com> (raw)
In-Reply-To: <20250107154408.814455-1-ckeepax@opensource.cirrus.com>

Compliment the existing macro to construct an SDCA control address
with macros to extract the constituent parts, and validation of such
an address. Also update the masks for the original macro to use
GENMASK to make mental comparisons with the included comment on the
address format easier.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---

No changes since v1.

 include/linux/soundwire/sdw_registers.h | 30 ++++++++++++++++++-------
 1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/include/linux/soundwire/sdw_registers.h b/include/linux/soundwire/sdw_registers.h
index 658b10fa5b20a..0a5939285583b 100644
--- a/include/linux/soundwire/sdw_registers.h
+++ b/include/linux/soundwire/sdw_registers.h
@@ -4,6 +4,9 @@
 #ifndef __SDW_REGISTERS_H
 #define __SDW_REGISTERS_H
 
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+
 /*
  * SDW registers as defined by MIPI 1.2 Spec
  */
@@ -329,16 +332,27 @@
  *	2:0		Control Number[2:0]
  */
 
-#define SDW_SDCA_CTL(fun, ent, ctl, ch)		(BIT(30) |			\
-						 (((fun) & 0x7) << 22) |	\
-						 (((ent) & 0x40) << 15) |	\
-						 (((ent) & 0x3f) << 7) |	\
-						 (((ctl) & 0x30) << 15) |	\
-						 (((ctl) & 0x0f) << 3) |	\
-						 (((ch) & 0x38) << 12) |	\
-						 ((ch) & 0x07))
+#define SDW_SDCA_CTL(fun, ent, ctl, ch)		(BIT(30) |				\
+						 (((fun) & GENMASK(2, 0)) << 22) |	\
+						 (((ent) & BIT(6)) << 15) |		\
+						 (((ent) & GENMASK(5, 0)) << 7) |	\
+						 (((ctl) & GENMASK(5, 4)) << 15) |	\
+						 (((ctl) & GENMASK(3, 0)) << 3) |	\
+						 (((ch) & GENMASK(5, 3)) << 12) |	\
+						 ((ch) & GENMASK(2, 0)))
+
+#define SDW_SDCA_CTL_FUNC(reg) FIELD_GET(GENMASK(24, 22), (reg))
+#define SDW_SDCA_CTL_ENT(reg) ((FIELD_GET(BIT(21), (reg)) << 6) | \
+				FIELD_GET(GENMASK(12, 7), (reg)))
+#define SDW_SDCA_CTL_CSEL(reg) ((FIELD_GET(GENMASK(20, 19), (reg)) << 4) | \
+				 FIELD_GET(GENMASK(6, 3), (reg)))
+#define SDW_SDCA_CTL_CNUM(reg) ((FIELD_GET(GENMASK(17, 15), (reg)) << 3) | \
+				 FIELD_GET(GENMASK(2, 0), (reg)))
 
 #define SDW_SDCA_MBQ_CTL(reg)			((reg) | BIT(13))
 #define SDW_SDCA_NEXT_CTL(reg)			((reg) | BIT(14))
 
+/* Check the reserved and fixed bits in address */
+#define SDW_SDCA_VALID_CTL(reg) (((reg) & (GENMASK(31, 25) | BIT(18) | BIT(13))) == BIT(30))
+
 #endif /* __SDW_REGISTERS_H */
-- 
2.39.5


  reply	other threads:[~2025-01-07 15:44 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-07 15:44 [PATCH v2 0/6] Expand SoundWire MBQ register map support Charles Keepax
2025-01-07 15:44 ` Charles Keepax [this message]
2025-01-07 15:44 ` [PATCH v2 2/6] ASoC: SDCA: Update list of entity_0 controls Charles Keepax
2025-01-07 15:44 ` [PATCH v2 3/6] regmap: sdw-mbq: Add support for further MBQ register sizes Charles Keepax
2025-01-07 15:44 ` [PATCH v2 4/6] regmap: sdw-mbq: Add support for SDCA deferred controls Charles Keepax
2025-01-07 15:44 ` [PATCH v2 5/6] ASoC: rt722-sdca: Add some missing readable registers Charles Keepax
2025-01-07 20:00   ` Pierre-Louis Bossart
2025-01-08 11:07     ` Charles Keepax
2025-01-07 15:44 ` [PATCH v2 6/6] ASoC: rt722-sdca: Make use of new expanded MBQ regmap Charles Keepax
2025-01-07 19:56 ` [PATCH v2 0/6] Expand SoundWire MBQ register map support Pierre-Louis Bossart
2025-01-08 13:32 ` (subset) " Mark Brown
2025-02-05 12:44 ` Mark Brown

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