From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE353207E0C for ; Fri, 10 Jan 2025 17:11:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.92.199 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736529084; cv=none; b=Bqc6Fe2SK8p4Mc5LbkaZ9FR1aUIbrO5x5MqBcENF7wolSwkiRHQYVXegiRCmo3HpmdxJTpnImKk+B/6t+JhGYDciXGo7/T1xfTGkU7aD1c2HXBLBnkQ4ZReGueqq/Gg34PKE0YmXwDfAeibqwUP3vuu+NPMcwJbOye1BL9Gkx88= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736529084; c=relaxed/simple; bh=lNFdyfSeL1klergueb2t/NryHttl4qk1qEJgWIIuzuM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=T8/MRn96ElJYYNP+/Ae88itul4TU1XgCp0yiCaY6Yf3gnQiUU7fRnbsNGwX3aabxbLUlYKGYQRSvS//RRRB3NvWOXjTyqmiISIHnrexzHS1Tg2TxmkuV8x2F44bc8bxxfa7+POavTOhDatEvNn4rwotxsNoLDfEg2Htfm/V3z/U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=TxG5spBd; arc=none smtp.client-ip=90.155.92.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="TxG5spBd" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2YU0QDoQOM32K13TWcjhf+/bOaMdJwgCQhaUXt/55OU=; b=TxG5spBdzk/I4fMYCR0xD55H3T HQDdiy1TyqRJJOxRVtiKGn8iK1TzOoXHlC3JZj9h4v76kp8XZyYGhSQYyPyaI+WttAME8Y1WW4JFJ YEwbNOocd+VRO4WDAyWCjQYVo5gdpD3vvUVVwkik0j++HwBCUCTcIE0DFiy2EsunN57+AZkHVhkNR c6khKyYeOD3I5tEneJ5pF+CbY+M70j1HQ4FYv0BSYP1R62nv+BzQVrNIqdZMVQwrFQMRcth6pBz3S KOvq6y9FgC8hYJk6xybprS42CNh9BysdViu60wdFJMxAWSc/rf5AYyQ2LC7veJ+fyql5pAR2xU4Kl H75Krqlw==; Received: from 77-249-17-89.cable.dynamic.v4.ziggo.nl ([77.249.17.89] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.98 #2 (Red Hat Linux)) id 1tWIXR-00000009r0E-07dY; Fri, 10 Jan 2025 17:11:13 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 5EDEE30063F; Fri, 10 Jan 2025 18:11:12 +0100 (CET) Date: Fri, 10 Jan 2025 18:11:12 +0100 From: Peter Zijlstra To: Mathieu Desnoyers Cc: libc-alpha , Florian Weimer , "carlos@redhat.com" , Mark Rutland , linux-kernel , x86@kernel.org, paulmck , Michael Jeanson Subject: Re: Prevent inconsistent CPU state after sequence of dlclose/dlopen Message-ID: <20250110171112.GF4213@noisy.programming.kicks-ass.net> References: <20250110165412.GC4213@noisy.programming.kicks-ass.net> <8c1ad304-61bb-4bdf-aa75-8633f3d0196c@efficios.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8c1ad304-61bb-4bdf-aa75-8633f3d0196c@efficios.com> On Fri, Jan 10, 2025 at 12:02:27PM -0500, Mathieu Desnoyers wrote: > On 2025-01-10 11:54, Peter Zijlstra wrote: > > On Fri, Jan 10, 2025 at 10:55:36AM -0500, Mathieu Desnoyers wrote: > > > Hi, > > > > > > I was discussing with Mark Rutland recently, and he pointed out that a > > > sequence of dlclose/dlopen mapping new code at the same addresses in > > > multithreaded environments is an issue on ARM, and possibly on Intel/AMD > > > with the newer TLB broadcast maintenance. > > > > What is the exact race? Should not munmap() invalidate the TLBs before > > it allows overlapping mmap() to complete? > > The race Mark mentioned (on ARM) is AFAIU the following scenario: > > CPU 0 CPU 1 > > - dlopen() > - mmap PROT_EXEC @addr > - fetch insn @addr, CPU state expects unchanged insn. > - execute unrelated code > - dlclose(addr) > - munmap @addr > - dlopen() > - mmap PROT_EXEC @addr > - fetch new insn @addr. Incoherent CPU state. Urgh.. Mark, is this because of non-coherent i-cache or somesuch misery? But shouldn't flush_{,i}cache_range() or something along those lines not handle this?