From: Divya Koppera <divya.koppera@microchip.com>
To: <andrew@lunn.ch>, <arun.ramadoss@microchip.com>,
<UNGLinuxDriver@microchip.com>, <hkallweit1@gmail.com>,
<linux@armlinux.org.uk>, <davem@davemloft.net>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<richardcochran@gmail.com>, <vadim.fedorenko@linux.dev>
Subject: [PATCH net-next v3 1/3] net: phy: microchip_rds_ptp: Header file library changes for PEROUT
Date: Wed, 15 Jan 2025 14:36:32 +0530 [thread overview]
Message-ID: <20250115090634.12941-2-divya.koppera@microchip.com> (raw)
In-Reply-To: <20250115090634.12941-1-divya.koppera@microchip.com>
This ptp header file library changes will cover PEROUT
macros that are required to generate periodic output
from pin out
Signed-off-by: Divya Koppera <divya.koppera@microchip.com>
---
v2 -> v3
- Removed redundant macros after modifying code to use
nearby pulsewidth value of user input.
v1 -> v2
- Removed redundant Macros
- Given proper naming to event and pin
---
drivers/net/phy/microchip_rds_ptp.h | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/net/phy/microchip_rds_ptp.h b/drivers/net/phy/microchip_rds_ptp.h
index e95c065728b5..25af68337b94 100644
--- a/drivers/net/phy/microchip_rds_ptp.h
+++ b/drivers/net/phy/microchip_rds_ptp.h
@@ -130,6 +130,23 @@
#define MCHP_RDS_PTP_TSU_HARD_RESET 0xc1
#define MCHP_RDS_PTP_TSU_HARDRESET BIT(0)
+#define MCHP_RDS_PTP_CLK_TRGT_SEC_HI 0x15
+#define MCHP_RDS_PTP_CLK_TRGT_SEC_LO 0x16
+#define MCHP_RDS_PTP_CLK_TRGT_NS_HI 0x17
+#define MCHP_RDS_PTP_CLK_TRGT_NS_LO 0x18
+
+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_HI 0x19
+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_LO 0x1a
+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_HI 0x1b
+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_LO 0x1c
+
+#define MCHP_RDS_PTP_GEN_CFG 0x01
+#define MCHP_RDS_PTP_GEN_CFG_LTC_EVT_MASK GENMASK(11, 8)
+
+#define MCHP_RDS_PTP_GEN_CFG_LTC_EVT_SET(value) (((value) & 0xF) << 4)
+#define MCHP_RDS_PTP_GEN_CFG_RELOAD_ADD BIT(0)
+#define MCHP_RDS_PTP_GEN_CFG_POLARITY BIT(1)
+
/* Represents 1ppm adjustment in 2^32 format with
* each nsec contains 4 clock cycles in 250MHz.
* The value is calculated as following: (1/1000000)/((2^-32)/4)
@@ -138,6 +155,10 @@
#define MCHP_RDS_PTP_FIFO_SIZE 8
#define MCHP_RDS_PTP_MAX_ADJ 31249999
+#define MCHP_RDS_PTP_BUFFER_TIME 2
+#define MCHP_RDS_PTP_N_PIN 4
+#define MCHP_RDS_PTP_N_PEROUT 1
+
#define BASE_CLK(p) ((p)->clk_base_addr)
#define BASE_PORT(p) ((p)->port_base_addr)
#define PTP_MMD(p) ((p)->mmd)
@@ -176,6 +197,9 @@ struct mchp_rds_ptp_clock {
/* Lock for phc */
struct mutex ptp_lock;
u8 mmd;
+ int mchp_rds_ptp_event;
+ int event_pin;
+ struct ptp_pin_desc *pin_config;
};
struct mchp_rds_ptp_rx_ts {
--
2.17.1
next prev parent reply other threads:[~2025-01-15 9:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 9:06 [PATCH net-next v3 0/3] Add PEROUT library for RDS PTP supported phys Divya Koppera
2025-01-15 9:06 ` Divya Koppera [this message]
2025-01-15 9:06 ` [PATCH net-next v3 2/3] net: phy: microchip_t1: Enable pin out specific to lan887x phy for PEROUT signal Divya Koppera
2025-01-15 9:06 ` [PATCH net-next v3 3/3] net: phy: microchip_rds_ptp : Add PEROUT feature library for RDS PTP supported Microchip phys Divya Koppera
2025-01-17 3:30 ` [PATCH net-next v3 0/3] Add PEROUT library for RDS PTP supported phys patchwork-bot+netdevbpf
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