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From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: mingo@redhat.com, acme@kernel.org, namhyung@kernel.org,
	irogers@google.com, adrian.hunter@intel.com,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	ak@linux.intel.com, eranian@google.com,
	dapeng1.mi@linux.intel.com, stable@vger.kernel.org
Subject: Re: [PATCH V9 1/3] perf/x86/intel: Avoid pmu_disable/enable if !cpuc->enabled in sample read
Date: Thu, 16 Jan 2025 11:51:14 +0100	[thread overview]
Message-ID: <20250116105114.GH8385@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20250116103256.GI8362@noisy.programming.kicks-ass.net>

On Thu, Jan 16, 2025 at 11:32:56AM +0100, Peter Zijlstra wrote:

> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index ba74e1198328..050098c54ae7 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -953,7 +953,7 @@ int intel_pmu_drain_bts_buffer(void)
>  	return 1;
>  }
>  
> -static inline void intel_pmu_drain_pebs_buffer(void)
> +void intel_pmu_drain_pebs_buffer(void)
>  {
>  	struct perf_sample_data data;
>  

Also, while poking there, I noticed we never did the below :/


---
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 5b491a6815e6..20a2556de645 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3081,7 +3081,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
 
 		handled++;
 		x86_pmu_handle_guest_pebs(regs, &data);
-		x86_pmu.drain_pebs(regs, &data);
+		static_call(x86_pmu_drain_pebs)(regs, &data);
 		status &= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;
 
 		/*
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 050098c54ae7..75e5e6678282 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -956,8 +956,7 @@ int intel_pmu_drain_bts_buffer(void)
 void intel_pmu_drain_pebs_buffer(void)
 {
 	struct perf_sample_data data;
-
-	x86_pmu.drain_pebs(NULL, &data);
+	static_call(x86_pmu_drain_pebs)(NULL, &data);
 }
 
 /*
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 38b3e30f8988..fb635e2b9909 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1107,6 +1107,7 @@ extern struct x86_pmu x86_pmu __read_mostly;
 
 DECLARE_STATIC_CALL(x86_pmu_set_period, *x86_pmu.set_period);
 DECLARE_STATIC_CALL(x86_pmu_update,     *x86_pmu.update);
+DECLARE_STATIC_CALL(x86_pmu_drain_pebs, *x86_pmu.drain_pebs);
 
 static __always_inline struct x86_perf_task_context_opt *task_context_opt(void *ctx)
 {

      reply	other threads:[~2025-01-16 10:51 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-15 18:43 [PATCH V9 1/3] perf/x86/intel: Avoid pmu_disable/enable if !cpuc->enabled in sample read kan.liang
2025-01-15 18:43 ` [PATCH V9 2/3] perf: Avoid the read if the count is already updated kan.liang
2025-01-15 18:43 ` [PATCH V9 3/3] perf/x86/intel: Support PEBS counters snapshotting kan.liang
2025-01-16 11:47   ` Peter Zijlstra
2025-01-16 15:55     ` Liang, Kan
2025-01-16 20:42       ` Peter Zijlstra
2025-01-16 20:56         ` Peter Zijlstra
2025-01-16 21:50           ` Liang, Kan
2025-01-21 15:25             ` Liang, Kan
2025-01-23  9:14             ` Peter Zijlstra
2025-01-23 15:36               ` Liang, Kan
2025-01-16 12:02   ` Peter Zijlstra
2025-01-16 10:32 ` [PATCH V9 1/3] perf/x86/intel: Avoid pmu_disable/enable if !cpuc->enabled in sample read Peter Zijlstra
2025-01-16 10:51   ` Peter Zijlstra [this message]

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