[PATCH v4 00/10] Add support for videocc, camcc, dispcc and gpucc on Qualcomm QCS615 platform

Taniya Das
2025-01-19T10:23:30Z

Add support for multimedia clock controllers on Qualcomm QCS615 platform.
Update the defconfig to enable these clock controllers.

Global clock controller support
https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-0-3d716ad0d987@quicinc.com/

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
Changes in v4:
- Drop patch Update the support for alpha mode configuration as this
patch was picked - https://lore.kernel.org/all/20241021-fix-alpha-mode-config-v1-1-f32c254e02bc@gmail.com/
- Update the bindings to include "qcom,gcc.yaml" [Dmitry]

Changes in v3:
- update PLL configs to use BIT and GENMASK for vco_val and vco_mask for all CCs [Bryan O'Donoghue]
- Link to v2: https://lore.kernel.org/r/20241101-qcs615-mm-clockcontroller-v2-0-d1a4870a4aed@quicinc.com

Changes in v2:
- cleanups in clk_alpha_pll_slew_update and clk_alpha_pll_slew_enable functions [Christophe]
- update PLL configs for "vco_val = 0x0" shift(20) [Bryan O'Donoghue]
- update PLL configs to use lower case for L value [Dmitry]
- Link parents for IFE/IPE/BPS GDSCs as Titan Top GDSC [Bryan O'Donoghue, Dmitry]
- Remove DT_BI_TCXO_AO from camcc-qcs615 [Dmitry]
- Remove HW_CTRL_TRIGGER from camcc-qcs615 [Bryan O'Donoghue]
- Update platform name for default configuration [Dmitry]
- Link to v1: https://lore.kernel.org/r/20241019-qcs615-mm-clockcontroller-v1-0-4cfb96d779ae@quicinc.com

To: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: Ajit Pandey <quic_ajipan@quicinc.com>
Cc: Imran Shaik <quic_imrashai@quicinc.com>
Cc: Jagadeesh Kona <quic_jkona@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>

---
Taniya Das (10):
clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs
dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller
clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Display clock controller
clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller
clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Video clock controller
clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver
arm64: defconfig: Enable QCS615 clock controllers

.../bindings/clock/qcom,qcs615-camcc.yaml | 54 +
.../bindings/clock/qcom,qcs615-dispcc.yaml | 73 +
.../bindings/clock/qcom,qcs615-gpucc.yaml | 66 +
.../bindings/clock/qcom,qcs615-videocc.yaml | 64 +
arch/arm64/configs/defconfig | 4 +
drivers/clk/qcom/Kconfig | 35 +
drivers/clk/qcom/Makefile | 4 +
drivers/clk/qcom/camcc-qcs615.c | 1591 ++++++++++++++++++++
drivers/clk/qcom/clk-alpha-pll.c | 170 +++
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/dispcc-qcs615.c | 786 ++++++++++
drivers/clk/qcom/gpucc-qcs615.c | 525 +++++++
drivers/clk/qcom/videocc-qcs615.c | 332 ++++
include/dt-bindings/clock/qcom,qcs615-camcc.h | 110 ++
include/dt-bindings/clock/qcom,qcs615-dispcc.h | 52 +
include/dt-bindings/clock/qcom,qcs615-gpucc.h | 39 +
include/dt-bindings/clock/qcom,qcs615-videocc.h | 30 +
17 files changed, 3936 insertions(+)
---
base-commit: 0907e7fb35756464aa34c35d6abb02998418164b
change-id: 20250119-qcs615-mm-v4-clockcontroller-f00502afe7e1

Best regards,
--
Taniya Das <quic_tdas@quicinc.com>