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Received: from 77-249-17-89.cable.dynamic.v4.ziggo.nl ([77.249.17.89] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.98 #2 (Red Hat Linux)) id 1tcjfP-0000000AWdg-0Zjx; Tue, 28 Jan 2025 11:22:03 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 6E65A30050D; Tue, 28 Jan 2025 12:22:02 +0100 (CET) Date: Tue, 28 Jan 2025 12:22:02 +0100 From: Peter Zijlstra To: Dapeng Mi Cc: Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Kan Liang , Andi Kleen , Eranian Stephane , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi Subject: Re: [PATCH 06/20] perf/x86/intel: Initialize architectural PEBS Message-ID: <20250128112202.GA7145@noisy.programming.kicks-ass.net> References: <20250123140721.2496639-1-dapeng1.mi@linux.intel.com> <20250123140721.2496639-7-dapeng1.mi@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250123140721.2496639-7-dapeng1.mi@linux.intel.com> On Thu, Jan 23, 2025 at 02:07:07PM +0000, Dapeng Mi wrote: > diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c > index e8a06c8486af..1b33a6a60584 100644 > --- a/arch/x86/events/intel/ds.c > +++ b/arch/x86/events/intel/ds.c > @@ -1537,6 +1537,9 @@ void intel_pmu_pebs_enable(struct perf_event *event) > > cpuc->pebs_enabled |= 1ULL << hwc->idx; > > + if (x86_pmu.arch_pebs) > + return; > + > if ((event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT) && (x86_pmu.version < 5)) > cpuc->pebs_enabled |= 1ULL << (hwc->idx + 32); > else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST) > @@ -1606,6 +1609,11 @@ void intel_pmu_pebs_disable(struct perf_event *event) > > cpuc->pebs_enabled &= ~(1ULL << hwc->idx); > > + hwc->config |= ARCH_PERFMON_EVENTSEL_INT; > + > + if (x86_pmu.arch_pebs) > + return; > + > if ((event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT) && > (x86_pmu.version < 5)) > cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32)); > @@ -1616,15 +1624,13 @@ void intel_pmu_pebs_disable(struct perf_event *event) > > if (cpuc->enabled) > wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); > - > - hwc->config |= ARCH_PERFMON_EVENTSEL_INT; > } > > void intel_pmu_pebs_enable_all(void) > { > struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); > > - if (cpuc->pebs_enabled) > + if (!x86_pmu.arch_pebs && cpuc->pebs_enabled) > wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); > } > > @@ -1632,7 +1638,7 @@ void intel_pmu_pebs_disable_all(void) > { > struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); > > - if (cpuc->pebs_enabled) > + if (!x86_pmu.arch_pebs && cpuc->pebs_enabled) > __intel_pmu_pebs_disable_all(); > } So there's a ton of if (arch_pebs) sprinkled around. Can't we avoid that by using a few static_call()s ?