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From: Andrew Jones <ajones@ventanamicro.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Anup Patel <anup@brainfault.org>,
	 Charlie Jenkins <charlie@rivosinc.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 paul.walmsley@sifive.com, palmer@dabbelt.com,
	jesse@rivosinc.com,  Anup Patel <apatel@ventanamicro.com>
Subject: Re: [PATCH 7/9] riscv: Prepare for unaligned access type table lookups
Date: Mon, 10 Feb 2025 15:06:18 +0100	[thread overview]
Message-ID: <20250210-e6a2dfcd7995ffc8a6d918e4@orel> (raw)
In-Reply-To: <c6f98a70-b1c7-4955-bf5d-546e4563cf1c@rivosinc.com>

On Mon, Feb 10, 2025 at 12:07:40PM +0100, Clément Léger wrote:
> 
> 
> On 10/02/2025 11:16, Anup Patel wrote:
> > On Sat, Feb 8, 2025 at 6:53 AM Charlie Jenkins <charlie@rivosinc.com> wrote:
> >>
> >> On Fri, Feb 07, 2025 at 05:19:47PM +0100, Andrew Jones wrote:
> >>> Probing unaligned accesses on boot is time consuming. Provide a
> >>> function which will be used to look up the access type in a table
> >>> by id registers. Vendors which provide table entries can then skip
> >>> the probing.
> >>
> >> The access checker in my experience is only time consuming on slow
> >> hardware. Hardware that supports fast unaligned accesses isn't really
> >> impacted by this? Avoiding a list of hardware that has slow/fast
> >> unaligned accesses in the kernel was the main reason for dynamically
> >> checking. We did introduce the config option to compile the kernel with
> >> assumed slow/fast accesses, which of course has the downside of
> >> recompiling the kernel and I assume that you already considered that.
> > 
> > The kconfig option does not align with the vision of running the same
> > kernel image across platforms.
> 
> I'd would be advocating to remove compile time options as well and use
> another way to skip the probe (see below).
> 
> > 
> >>
> >> Instead of having a table in the kernel, something that would be more
> >> platform agnostic would be to have an extension that signals this
> >> information. That seems like it would accomplish the same goal and
> >> leverage the existing infrastructure in the kernel, albeit with the need
> >> to make a new extension.
> >>
> > 
> > IMO, expecting an ISA extension to be defined for all possible
> > microarchitectural choices is not going to scale so it is better
> > to have infrastructure in kernel itself to infer microarchitectural
> > choices based on RISC-V implementation ID.
> 
> Since adding an extension seems quite unlikely, and that a device-tree
> property is likely DT centric and not applicable to ACPI as well, was a
> command line argument considered ?
>

I did consider adding a command line option in addition to the table,
allowing platforms which neither have a table entry [yet] nor want to do
the speed test, to set whatever they like. In the end, I dropped it, since
I don't have a use case at this time. However, if we really don't want a
table, then I can look into the command line option instead.

Thanks,
drew

  reply	other threads:[~2025-02-10 14:06 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-07 16:19 [PATCH 0/9] riscv: Unaligned access speed probing fixes and skipping Andrew Jones
2025-02-07 16:19 ` [PATCH 1/9] riscv: Annotate unaligned access init functions Andrew Jones
2025-02-13 12:59   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 2/9] riscv: Fix riscv_online_cpu_vec Andrew Jones
2025-02-07 16:47   ` Clément Léger
2025-02-07 17:08     ` Andrew Jones
2025-02-07 17:43       ` Clément Léger
2025-02-07 18:08         ` Andrew Jones
2025-02-13 13:02   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 3/9] riscv: Fix check_unaligned_access_all_cpus Andrew Jones
2025-02-13 13:12   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 4/9] riscv: Change check_unaligned_access_speed_all_cpus to void Andrew Jones
2025-02-07 16:42   ` Clément Léger
2025-02-13 13:15   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 5/9] riscv: Fix set up of cpu hotplug callbacks Andrew Jones
2025-02-07 16:44   ` Clément Léger
2025-02-13 13:25   ` Alexandre Ghiti
2025-02-13 13:33   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 6/9] riscv: Fix set up of vector cpu hotplug callback Andrew Jones
2025-02-07 17:36   ` Clément Léger
2025-02-07 18:15     ` Andrew Jones
2025-02-13 13:28   ` Alexandre Ghiti
2025-02-07 16:19 ` [PATCH 7/9] riscv: Prepare for unaligned access type table lookups Andrew Jones
2025-02-08  1:22   ` Charlie Jenkins
2025-02-10  9:43     ` Andrew Jones
2025-02-10 17:10       ` Charlie Jenkins
2025-02-10 10:16     ` Anup Patel
2025-02-10 11:07       ` Clément Léger
2025-02-10 14:06         ` Andrew Jones [this message]
2025-02-10 14:20           ` Clément Léger
2025-02-10 17:20             ` Charlie Jenkins
2025-02-10 20:42               ` Clément Léger
2025-02-10 20:53                 ` Charlie Jenkins
2025-02-10 20:57                   ` Clément Léger
2025-02-10 21:13                     ` Charlie Jenkins
2025-02-11  4:26                     ` Anup Patel
2025-02-11  8:37                       ` Clément Léger
2025-02-11 18:09                       ` Palmer Dabbelt
2025-02-10 17:19       ` Charlie Jenkins
2025-02-10 20:37         ` Clément Léger
2025-02-11  9:04           ` Andrew Jones
2025-02-07 16:19 ` [PATCH 8/9] riscv: Implement check_unaligned_access_table Andrew Jones
2025-02-07 16:19 ` [PATCH 9/9] riscv: Add Ventana unaligned access table entries Andrew Jones
2025-02-08  7:59 ` [PATCH 0/9] riscv: Unaligned access speed probing fixes and skipping Anup Patel
2025-02-10  9:26   ` Andrew Jones
2025-02-10  9:58     ` Anup Patel
2025-02-10 11:01       ` Andrew Jones

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