Re: [PATCH v3 17/18] cxl: Add a dev_dbg() when a decoder was added to a port

Jonathan Cameron
2025-02-14T16:37:27Z

On Tue, 11 Feb 2025 10:53:47 +0100
Robert Richter <rrichter@amd.com> wrote:

> Improve debugging by adding and unifying messages whenever a decoder
> was added to a port. It is especially useful to get the decoder
> mapping of the involved CXL host bridge or PCI device. This avoids a
> complex lookup of the decoder/port/device mappings in sysfs.
>
> Example log messages:
>
> cxl_acpi ACPI0017:00: decoder0.0 added to root0
> cxl_acpi ACPI0017:00: decoder0.1 added to root0
> ...
> pci0000:e0: decoder1.0 added to port1
> pci0000:e0: decoder1.1 added to port1
> ...
> cxl_mem mem0: decoder5.0 added to endpoint5
> cxl_mem mem0: decoder5.1 added to endpoint5
>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Reviewed-by: Gregory Price <gourry@gourry.net>
> Tested-by: Gregory Price <gourry@gourry.net>
Seems reasonable to me.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>