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([10.24.69.142]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 51IIsrxc123821; Tue, 18 Feb 2025 12:55:08 -0600 From: Vaishnav Achath To: , , , , , , , CC: , , , Subject: [PATCH 4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 Date: Wed, 19 Feb 2025 00:24:51 +0530 Message-ID: <20250218185452.600797-5-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250218185452.600797-1-vaishnav.a@ti.com> References: <20250218185452.600797-1-vaishnav.a@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea RPi v2 Camera (IMX219) is an 8MP camera that can be used with J722S EVM through the 22-pin CSI-RX connector. Add a reference overlay for quad IMX219 RPI camera v2 modules on J722S EVM Signed-off-by: Vaishnav Achath --- arch/arm64/boot/dts/ti/Makefile | 5 + ...k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso | 304 ++++++++++++++++++ 2 files changed, 309 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 8a4bdf87e2d4..9ae0917e5763 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo # Boards with J722s SoC dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo # Boards with J784s4 SoC dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb @@ -209,6 +210,8 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ k3-j721s2-evm-pcie1-ep.dtbo +k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \ + k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtbo k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \ @@ -243,6 +246,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-evm-pcie1-ep.dtb \ k3-j721e-sk-csi2-dual-imx219.dtb \ k3-j721s2-evm-pcie1-ep.dtb \ + k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtb \ k3-j784s4-evm-quad-port-eth-exp1.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtb @@ -266,5 +270,6 @@ DTC_FLAGS_k3-j721e-common-proc-board += -@ DTC_FLAGS_k3-j721e-evm-pcie0-ep += -@ DTC_FLAGS_k3-j721e-sk += -@ DTC_FLAGS_k3-j721s2-common-proc-board += -@ +DTC_FLAGS_k3-j722s-evm += -@ DTC_FLAGS_k3-j784s4-evm += -@ DTC_FLAGS_k3-j742s2-evm += -@ diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso new file mode 100644 index 000000000000..4c5ec2c7826e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * DT Overlay for RPi Camera V2.1 on J722S-EVM board. + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * Schematics: https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&main_pmx0 { + cam0_reset_pins_default: cam0-reset-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x03c, PIN_OUTPUT, 7) + >; + }; + + cam1_reset_pins_default: cam1-reset-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x044, PIN_OUTPUT, 7) + >; + }; + + cam2_reset_pins_default: cam2-reset-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x04c, PIN_OUTPUT, 7) + >; + }; + + cam3_reset_pins_default: cam3-reset-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x054, PIN_OUTPUT, 7) + >; + }; +}; + +&{/} { + clk_imx219_fixed: imx219-xclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; +}; + +&exp1 { + p06-hog{ + /* P06 - CSI01_MUX_SEL_2 */ + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CSI01_MUX_SEL_2"; + }; + + p07-hog{ + /* P01 - CSI23_MUX_SEL_2 */ + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "CSI23_MUX_SEL_2"; + }; +}; + +&pca9543_0 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-alias-pool = /bits/ 16 <0x10 0x11>; + + /* CAM0 I2C */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + imx219_0: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; + clock-names = "xclk"; + + pinctrl-names = "default"; + pinctrl-0 = <&cam0_reset_pins_default>; + + reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2rx0_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; + + /* CAM1 I2C */ + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + imx219_1: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; + clock-names = "xclk"; + + pinctrl-names = "default"; + pinctrl-0 = <&cam1_reset_pins_default>; + + reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam1: endpoint { + remote-endpoint = <&csi2rx1_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; +}; + +&pca9543_1 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-alias-pool = /bits/ 16 <0x10 0x11>; + + /* CAM0 I2C */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + imx219_2: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; + clock-names = "xclk"; + + pinctrl-names = "default"; + pinctrl-0 = <&cam2_reset_pins_default>; + + reset-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam2: endpoint { + remote-endpoint = <&csi2rx2_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; + + /* CAM1 I2C */ + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + imx219_3: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; + clock-names = "xclk"; + + pinctrl-names = "default"; + pinctrl-0 = <&cam3_reset_pins_default>; + + reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam3: endpoint { + remote-endpoint = <&csi2rx3_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; +}; + +&cdns_csi2rx0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi0_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cdns_csi2rx1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi1_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx1_in_sensor: endpoint { + remote-endpoint = <&csi2_cam1>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cdns_csi2rx2 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi2_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx2_in_sensor: endpoint { + remote-endpoint = <&csi2_cam2>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cdns_csi2rx3 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi3_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx3_in_sensor: endpoint { + remote-endpoint = <&csi2_cam3>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; + +&dphy0 { + status = "okay"; +}; + +&ti_csi2rx1 { + status = "okay"; +}; + +&dphy1 { + status = "okay"; +}; + +&ti_csi2rx2 { + status = "okay"; +}; + +&dphy2 { + status = "okay"; +}; + +&ti_csi2rx3 { + status = "okay"; +}; + +&dphy3 { + status = "okay"; +}; -- 2.34.1