From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39CD31C6FFA; Tue, 18 Feb 2025 20:26:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739910392; cv=none; b=Cj8ElU41dLGDoPo+c62zg23oxv4ogk9n6GZHuTmy6dvGS90rDCqbwv61Gispo1bxuoaH/rZ3UobKkQmpW/MkHFK0LpF6QGFx07TYrrCKNQnq5NjQ7onpT7vDppLs1kyysljG9Z1JIfPwkQVUQ6nvVHC/YKN3mtLmdkVAnknGxuo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739910392; c=relaxed/simple; bh=pVOoDpWjbnxIdBWRJkyoj9v86S/OZbRdwlaUviOAvaY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S0gyq11+d/ZatvKBWKRRw0+oOlAW/T+s4IM0ddAAJ1hsAfGvr9pZ6Weyzo205r0jPbIOTAz+y1lkLMG1uAomilOMIWLKEvPDs3aFMy7FO0ab4EsO3wMj2OkmDPR9EzSEw/rEk2ANABA6G+zYewj/Fl49nVJgZG2slIPcB0UTXIU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tK6wevjZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tK6wevjZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7B2B5C4CEE2; Tue, 18 Feb 2025 20:26:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739910391; bh=pVOoDpWjbnxIdBWRJkyoj9v86S/OZbRdwlaUviOAvaY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tK6wevjZ3myT9GPS8gLan/8/CkYOI1KmkzBqaI5mjY37b2CqkBnVwkCdoJFEl/iO0 l0Hzp71QghqYDqEqHRWRdUYGFnYh23r8owxfnodMQ5iejIuIIVpgf769BFhN1G1z6u b75AEoUzxY6ObckdxTwOTfDAbo6x9jNDXleCHIGWE2Ii9p783x8MsnOpuAdMVsPek5 i4KZ25tSQ4IBpoVydiUqufzc6qaBsG6Mydc509g2xDYqQordqspzXNuxQHTaGGYDhK pHKGgacaZYpcgccjDPOtFRAi81HmDLTRpfXpemQps1+8DTbAdw0Usg/cB7zIstWLZg OR1E9d+NW2Oxg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Zhang Lixu , Srinivas Pandruvada , Jiri Kosina , Sasha Levin , jikos@kernel.org, bentiss@kernel.org, andriy.shevchenko@intel.com, linux@treblig.org, linux-input@vger.kernel.org Subject: [PATCH AUTOSEL 6.12 03/31] HID: intel-ish-hid: Send clock sync message immediately after reset Date: Tue, 18 Feb 2025 15:25:49 -0500 Message-Id: <20250218202619.3592630-3-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250218202619.3592630-1-sashal@kernel.org> References: <20250218202619.3592630-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.12.15 Content-Transfer-Encoding: 8bit From: Zhang Lixu [ Upstream commit 7e0d1cff12b895f44f4ddc8cf50311bc1f775201 ] The ISH driver performs a clock sync with the firmware once at system startup and then every 20 seconds. If a firmware reset occurs right after a clock sync, the driver would wait 20 seconds before performing another clock sync with the firmware. This is particularly problematic with the introduction of the "load firmware from host" feature, where the driver performs a clock sync with the bootloader and then has to wait 20 seconds before syncing with the main firmware. This patch clears prev_sync immediately upon receiving an IPC reset, so that the main firmware and driver will perform a clock sync immediately after completing the IPC handshake. Signed-off-by: Zhang Lixu Acked-by: Srinivas Pandruvada Signed-off-by: Jiri Kosina Signed-off-by: Sasha Levin --- drivers/hid/intel-ish-hid/ipc/ipc.c | 9 ++++++--- drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/hid/intel-ish-hid/ipc/ipc.c b/drivers/hid/intel-ish-hid/ipc/ipc.c index cb956a8c386cb..4c861119e97aa 100644 --- a/drivers/hid/intel-ish-hid/ipc/ipc.c +++ b/drivers/hid/intel-ish-hid/ipc/ipc.c @@ -517,6 +517,10 @@ static int ish_fw_reset_handler(struct ishtp_device *dev) /* ISH FW is dead */ if (!ish_is_input_ready(dev)) return -EPIPE; + + /* Send clock sync at once after reset */ + ishtp_dev->prev_sync = 0; + /* * Set HOST2ISH.ILUP. Apparently we need this BEFORE sending * RESET_NOTIFY_ACK - FW will be checking for it @@ -577,13 +581,12 @@ static void fw_reset_work_fn(struct work_struct *work) */ static void _ish_sync_fw_clock(struct ishtp_device *dev) { - static unsigned long prev_sync; struct ipc_time_update_msg time = {}; - if (prev_sync && time_before(jiffies, prev_sync + 20 * HZ)) + if (dev->prev_sync && time_before(jiffies, dev->prev_sync + 20 * HZ)) return; - prev_sync = jiffies; + dev->prev_sync = jiffies; /* The fields of time would be updated while sending message */ ipc_send_mng_msg(dev, MNG_SYNC_FW_CLOCK, &time, sizeof(time)); } diff --git a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h index cdacce0a4c9d7..b35afefd036d4 100644 --- a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h +++ b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h @@ -242,6 +242,8 @@ struct ishtp_device { unsigned int ipc_tx_cnt; unsigned long long ipc_tx_bytes_cnt; + /* Time of the last clock sync */ + unsigned long prev_sync; const struct ishtp_hw_ops *ops; size_t mtu; uint32_t ishtp_msg_hdr; -- 2.39.5