[PATCH v2 2/6] media: v4l: fwnode: parse Virtual Channel IDs for CSI2 buses

Cosmin Tanislav
2025-02-20T23:08:45Z

Multi-camera systems often have issues with receiving video streams
from multiple cameras at the same time because the cameras use the same
Virtual Channel IDs.

CSI bridges might not support remapping the Virtual Channel IDs, making
it impossible to receive the separate video streams at the same
time, while the CSI receiver is able to de-mux streams based on VC IDs.

Cameras sometimes have support for changing the VC IDs they output
themselves.

For a practical example, GMSL2 deserializer chips do not support VC ID
remapping in tunnel mode, and neither do the serializers. Allowing the
cameras to have their VC IDs configured would allow multi-camera setups
to use tunnel mode.

Add support for parsing VC IDs in v4l2_fwnode_endpoint_parse().
This allows us to retrieve the specified VC IDs in camera drivers and
configure the hardware to use them.

The supported values are 0 to 3, with a maximum of 4 values.
Although the CSI-2 specification allows for up to 32 virtual channels,
most hardware doesn't support more than 4. This can be extended later
if need be.

The driver must validate the number of VC IDs and the VC IDs
themselves.

Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
---
drivers/media/v4l2-core/v4l2-fwnode.c | 15 +++++++++++++++
include/media/v4l2-mediabus.h | 5 +++++
2 files changed, 20 insertions(+)

diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index cb153ce42c45d..97ecc01e1e39e 100644
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -129,8 +129,10 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
bool have_clk_lane = false, have_data_lanes = false,
have_lane_polarities = false, have_line_orders = false;
unsigned int flags = 0, lanes_used = 0;
+ u32 vc_ids_array[V4L2_MBUS_CSI2_MAX_VC_IDS];
u32 array[1 + V4L2_MBUS_CSI2_MAX_DATA_LANES];
u32 clock_lane = 0;
+ unsigned int num_vc_ids = 0;
unsigned int num_data_lanes = 0;
bool use_default_lane_mapping = false;
unsigned int i;
@@ -208,6 +210,15 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
have_line_orders = true;
}

+ rval = fwnode_property_count_u32(fwnode, "vc-ids");
+ if (rval > 0) {
+ num_vc_ids =
+ min_t(unsigned int, V4L2_MBUS_CSI2_MAX_VC_IDS, rval);
+
+ fwnode_property_read_u32_array(fwnode, "vc-ids", vc_ids_array,
+ num_vc_ids);
+ }
+
if (!fwnode_property_read_u32(fwnode, "clock-lanes", &v)) {
clock_lane = v;
pr_debug("clock lane position %u\n", v);
@@ -248,6 +259,10 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
bus->data_lanes[i] = array[i];
}

+ bus->num_vc_ids = num_vc_ids;
+ for (i = 0; i < num_vc_ids; i++)
+ bus->vc_ids[i] = vc_ids_array[i];
+
if (have_lane_polarities) {
fwnode_property_read_u32_array(fwnode,
"lane-polarities", array,
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h
index 24c738cd78940..291b680d2a845 100644
--- a/include/media/v4l2-mediabus.h
+++ b/include/media/v4l2-mediabus.h
@@ -72,6 +72,7 @@
#define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK BIT(0)

#define V4L2_MBUS_CSI2_MAX_DATA_LANES 8
+#define V4L2_MBUS_CSI2_MAX_VC_IDS 4

/**
* enum v4l2_mbus_csi2_cphy_line_orders_type - CSI-2 C-PHY line order
@@ -94,8 +95,10 @@ enum v4l2_mbus_csi2_cphy_line_orders_type {
/**
* struct v4l2_mbus_config_mipi_csi2 - MIPI CSI-2 data bus configuration
* @flags: media bus (V4L2_MBUS_*) flags
+ * @vc_ids: an array of Virtual Channel IDs
* @data_lanes: an array of physical data lane indexes
* @clock_lane: physical lane index of the clock lane
+ * @num_vc_ids: number of Virtual Channel IDs
* @num_data_lanes: number of data lanes
* @lane_polarities: polarity of the lanes. The order is the same of
* the physical lanes.
@@ -104,8 +107,10 @@ enum v4l2_mbus_csi2_cphy_line_orders_type {
*/
struct v4l2_mbus_config_mipi_csi2 {
unsigned int flags;
+ unsigned char vc_ids[V4L2_MBUS_CSI2_MAX_VC_IDS];
unsigned char data_lanes[V4L2_MBUS_CSI2_MAX_DATA_LANES];
unsigned char clock_lane;
+ unsigned char num_vc_ids;
unsigned char num_data_lanes;
bool lane_polarities[1 + V4L2_MBUS_CSI2_MAX_DATA_LANES];
enum v4l2_mbus_csi2_cphy_line_orders_type line_orders[V4L2_MBUS_CSI2_MAX_DATA_LANES];
--
2.48.1