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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e47b7c43sm2009977f8f.49.2025.02.27.05.21.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 05:21:15 -0800 (PST) Date: Thu, 27 Feb 2025 14:21:14 +0100 From: Igor Mammedov To: Mauro Carvalho Chehab Cc: "Michael S . Tsirkin" , Jonathan Cameron , Shiju Jose , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Dongjiu Geng , linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 19/21] docs: hest: add new "etc/acpi_table_hest_addr" and update workflow Message-ID: <20250227142114.350e4cd7@imammedo.users.ipa.redhat.com> In-Reply-To: <205abbc22ce816d88aa6c1c7058607fe35aae1ea.1740653898.git.mchehab+huawei@kernel.org> References: <205abbc22ce816d88aa6c1c7058607fe35aae1ea.1740653898.git.mchehab+huawei@kernel.org> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 27 Feb 2025 12:03:49 +0100 Mauro Carvalho Chehab wrote: > While the HEST layout didn't change, there are some internal > changes related to how offsets are calculated and how memory error > events are triggered. > > Update specs to reflect such changes. > > Signed-off-by: Mauro Carvalho Chehab > --- > docs/specs/acpi_hest_ghes.rst | 28 +++++++++++++++++----------- > 1 file changed, 17 insertions(+), 11 deletions(-) > > diff --git a/docs/specs/acpi_hest_ghes.rst b/docs/specs/acpi_hest_ghes.rst > index c3e9f8d9a702..f3cb3074b082 100644 > --- a/docs/specs/acpi_hest_ghes.rst > +++ b/docs/specs/acpi_hest_ghes.rst > @@ -89,12 +89,21 @@ Design Details > addresses in the "error_block_address" fields with a pointer to the > respective "Error Status Data Block" in the "etc/hardware_errors" blob. > > -(8) QEMU defines a third and write-only fw_cfg blob which is called > - "etc/hardware_errors_addr". Through that blob, the firmware can send back > - the guest-side allocation addresses to QEMU. The "etc/hardware_errors_addr" > - blob contains a 8-byte entry. QEMU generates a single WRITE_POINTER command > - for the firmware. The firmware will write back the start address of > - "etc/hardware_errors" blob to the fw_cfg file "etc/hardware_errors_addr". > +(8) QEMU defines a third and write-only fw_cfg blob to store the location > + where the error block offsets, read ack registers and CPER records are > + stored. > + > + Up to QEMU 9.2, the location was at "etc/hardware_errors_addr", and > + contains an offset for the beginning of "etc/hardware_errors". s/^^^^/GPA/ > + > + Newer versions place the location at "etc/acpi_table_hest_addr", s/^^^^^^^^^^^/GPA or address/ > + pointing to the beginning of the HEST table. > + > + Through that such offsets, the firmware can send back the guest-side ^^^ see my previous s comment on that > + allocation addresses to QEMU. They contain a 8-byte entry. QEMU generates > + a single WRITE_POINTER command for the firmware. The firmware will write > + back the start address of either "etc/hardware_errors" or HEST table at > + the correspoinding address firmware. ^^^^^^^^^^^^^^^^ what is it? perhaps it should be "fwcfg file"? > > (9) When QEMU gets a SIGBUS from the kernel, QEMU writes CPER into corresponding > "Error Status Data Block", guest memory, and then injects platform specific > @@ -105,8 +114,5 @@ Design Details > kernel, on receiving notification, guest APEI driver could read the CPER error > and take appropriate action. > > -(11) kvm_arch_on_sigbus_vcpu() uses source_id as index in "etc/hardware_errors" to > - find out "Error Status Data Block" entry corresponding to error source. So supported > - source_id values should be assigned here and not be changed afterwards to make sure > - that guest will write error into expected "Error Status Data Block" even if guest was > - migrated to a newer QEMU. > +(11) kvm_arch_on_sigbus_vcpu() report RAS errors via a SEA notifications, > + when a SIGBUS event is triggered.