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Signed-off-by: Christophe Parant --- .../st/stm32mp157c-phyboard-sargas-rdk.dts | 2 +- .../dts/st/stm32mp15xx-phyboard-sargas.dtsi | 317 +---------------- .../boot/dts/st/stm32mp15xx-phycore-som.dtsi | 329 ++++++++++++++++++ 3 files changed, 331 insertions(+), 317 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi diff --git a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts b/arc= h/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts index cb5a55798036..43592234573c 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts @@ -9,7 +9,7 @@ #include #include "stm32mp157.dtsi" #include "stm32mp15xc.dtsi" -#include "stm32mp15xxac-pinctrl.dtsi" +#include "stm32mp15xx-phycore-som.dtsi" #include "stm32mp15xx-phyboard-sargas.dtsi" =20 / { diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi b/arch/a= rm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi index ebbb82c09a1e..2fdab99fc562 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi @@ -5,23 +5,13 @@ * Author: Dom VOVARD . */ =20 -#include -#include + #include #include #include #include -#include -#include -#include "stm32mp15-pinctrl.dtsi" =20 / { - aliases { - ethernet0 =3D ðernet0; - rtc0 =3D &i2c4=5Frtc; - rtc1 =3D &rtc; - }; - chosen { stdout-path =3D "serial0:115200n8"; }; @@ -42,48 +32,6 @@ key-enter { }; }; =20 - reserved-memory { - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; - - retram: retram@38000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x38000000 0x10000>; - no-map; - }; - - mcuram: mcuram@30000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x30000000 0x40000>; - no-map; - }; - - mcuram2: mcuram2@10000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x10000000 0x40000>; - no-map; - }; - - vdev0vring0: vdev0vring0@10040000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x10040000 0x1000>; - no-map; - }; - - vdev0vring1: vdev0vring1@10041000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x10041000 0x1000>; - no-map; - }; - - vdev0buffer: vdev0buffer@10042000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x10042000 0x4000>; - no-map; - }; - }; - sound { compatible =3D "audio-graph-card"; label =3D "STM32MP1-PHYCORE"; @@ -93,44 +41,6 @@ sound { dais =3D <&sai2b=5Fport>, <&sai2a=5Fport>; }; - - regulator=5Fvin: regulator { - compatible =3D "regulator-fixed"; - regulator-name =3D "vin"; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - regulator-always-on; - }; -}; - -ðernet0 { - pinctrl-0 =3D <ðernet0=5Frgmii=5Fpins=5Fd>; - pinctrl-1 =3D <ðernet0=5Frgmii=5Fsleep=5Fpins=5Fd>; - pinctrl-names =3D "default", "sleep"; - phy-mode =3D "rgmii-id"; - max-speed =3D <1000>; - phy-handle =3D <&phy0>; - st,eth-clk-sel; - status =3D "okay"; - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - compatible =3D "snps,dwmac-mdio"; - - phy0: ethernet-phy@1 { - compatible =3D "ethernet-phy-ieee802.3-c22"; - reg =3D <1>; - interrupt-parent =3D <&gpiog>; - interrupts =3D <12 IRQ=5FTYPE=5FEDGE=5FFALLING>; - ti,rx-internal-delay =3D ; - ti,tx-internal-delay =3D ; - ti,fifo-depth =3D ; - ti,min-output-impedance; - enet-phy-lane-no-swap; - ti,clk-output-sel =3D ; - }; - }; }; =20 &i2c1 { @@ -222,176 +132,6 @@ led-2 { }; }; =20 -&i2c4 { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&i2c4=5Fpins=5Fa>; - pinctrl-1 =3D <&i2c4=5Fsleep=5Fpins=5Fa>; - i2c-scl-rising-time-ns =3D <185>; - i2c-scl-falling-time-ns =3D <20>; - status =3D "okay"; - - pmic@33 { - compatible =3D "st,stpmic1"; - reg =3D <0x33>; - interrupts-extended =3D <&gpioa 0 IRQ=5FTYPE=5FEDGE=5FFALLING>; - interrupt-controller; - #interrupt-cells =3D <2>; - - regulators { - compatible =3D "st,stpmic1-regulators"; - buck1-supply =3D <®ulator=5Fvin>; - buck2-supply =3D <®ulator=5Fvin>; - buck3-supply =3D <®ulator=5Fvin>; - buck4-supply =3D <®ulator=5Fvin>; - ldo1-supply =3D <&v3v3>; - ldo2-supply =3D <&v3v3>; - ldo3-supply =3D <&vdd=5Fddr>; - ldo4-supply =3D <®ulator=5Fvin>; - ldo5-supply =3D <&v3v3>; - ldo6-supply =3D <&v3v3>; - boost-supply =3D <®ulator=5Fvin>; - pwr=5Fsw1-supply =3D <&bst=5Fout>; - pwr=5Fsw2-supply =3D <&bst=5Fout>; - - vddcore: buck1 { - regulator-name =3D "vddcore"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1350000>; - regulator-always-on; - regulator-initial-mode =3D <0>; - }; - - vdd=5Fddr: buck2 { - regulator-name =3D "vdd=5Fddr"; - regulator-min-microvolt =3D <1350000>; - regulator-max-microvolt =3D <1350000>; - regulator-always-on; - regulator-initial-mode =3D <0>; - }; - - vdd: buck3 { - regulator-name =3D "vdd"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-always-on; - st,mask-reset; - regulator-initial-mode =3D <0>; - }; - - v3v3: buck4 { - regulator-name =3D "v3v3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-always-on; - regulator-initial-mode =3D <0>; - }; - - v1v8=5Faudio: ldo1 { - regulator-name =3D "v1v8=5Faudio"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-always-on; - interrupts =3D ; - - }; - - vdd=5Feth=5F2v5: ldo2 { - regulator-name =3D "dd=5Feth=5F2v5"; - regulator-min-microvolt =3D <2500000>; - regulator-max-microvolt =3D <2500000>; - regulator-always-on; - interrupts =3D ; - - }; - - vtt=5Fddr: ldo3 { - regulator-name =3D "vtt=5Fddr"; - regulator-min-microvolt =3D <500000>; - regulator-max-microvolt =3D <750000>; - regulator-always-on; - regulator-over-current-protection; - }; - - vdd=5Fusb: ldo4 { - regulator-name =3D "vdd=5Fusb"; - interrupts =3D ; - }; - - vdda: ldo5 { - regulator-name =3D "vdda"; - regulator-min-microvolt =3D <2900000>; - regulator-max-microvolt =3D <2900000>; - interrupts =3D ; - regulator-boot-on; - }; - - vdd=5Feth=5F1v0: ldo6 { - regulator-name =3D "vdd=5Feth=5F1v0"; - regulator-min-microvolt =3D <1000000>; - regulator-max-microvolt =3D <1000000>; - regulator-always-on; - interrupts =3D ; - - }; - - vref=5Fddr: vref=5Fddr { - regulator-name =3D "vref=5Fddr"; - regulator-always-on; - }; - - bst=5Fout: boost { - regulator-name =3D "bst=5Fout"; - interrupts =3D ; - }; - - vbus=5Fotg: pwr=5Fsw1 { - regulator-name =3D "vbus=5Fotg"; - interrupts =3D ; - regulator-active-discharge =3D <1>; - }; - - vbus=5Fsw: pwr=5Fsw2 { - regulator-name =3D "vbus=5Fsw"; - interrupts =3D ; - regulator-active-discharge =3D <1>; - }; - }; - - onkey { - compatible =3D "st,stpmic1-onkey"; - interrupts =3D , - ; - interrupt-names =3D "onkey-falling", - "onkey-rising"; - power-off-time-sec =3D <10>; - }; - - watchdog { - compatible =3D "st,stpmic1-wdt"; - }; - }; - - i2c4=5Feeprom: eeprom@50 { - compatible =3D "microchip,24c32", - "atmel,24c32"; - reg =3D <0x50>; - }; - - i2c4=5Frtc: rtc@52 { - compatible =3D "microcrystal,rv3028"; - reg =3D <0x52>; - }; -}; - -&ipcc { - status =3D "okay"; -}; - -&iwdg2 { - timeout-sec =3D <32>; - status =3D "okay"; -}; - &m=5Fcan2 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&m=5Fcan2=5Fpins=5Fa>; @@ -399,46 +139,6 @@ &m=5Fcan2 { status =3D "okay"; }; =20 -&m4=5Frproc { - memory-region =3D <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, - <&vdev0vring1>, <&vdev0buffer>; - mboxes =3D <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; - mbox-names =3D "vq0", "vq1", "shutdown", "detach"; - interrupt-parent =3D <&exti>; - interrupts =3D <68 1>; - status =3D "okay"; -}; - -&pwr=5Fregulators { - vdd-supply =3D <&vdd>; - vdd=5F3v3=5Fusbfs-supply =3D <&vdd=5Fusb>; -}; - -&qspi { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&qspi=5Fclk=5Fpins=5Fa &qspi=5Fbk1=5Fpins=5Fa>; - pinctrl-1 =3D <&qspi=5Fclk=5Fsleep=5Fpins=5Fa &qspi=5Fbk1=5Fsleep=5Fpins= =5Fa>; - status =3D "okay"; - - flash0: flash@0 { - compatible =3D "winbond,w25q128", "jedec,spi-nor"; - reg =3D <0>; - spi-rx-bus-width =3D <4>; - spi-max-frequency =3D <50000000>; - m25p,fast-read; - #address-cells =3D <1>; - #size-cells =3D <1>; - }; -}; - -&rng1 { - status =3D "okay"; -}; - -&rtc { - status =3D "okay"; -}; - &sai2 { clocks =3D <&rcc SAI2>, <&rcc PLL3=5FQ>, <&rcc PLL3=5FR>; clock-names =3D "pclk", "x8k", "x11k"; @@ -492,21 +192,6 @@ &sdmmc1 { status =3D "okay"; }; =20 -&sdmmc2 { - pinctrl-names =3D "default", "opendrain", "sleep"; - pinctrl-0 =3D <&sdmmc2=5Fb4=5Fpins=5Fa &sdmmc2=5Fd47=5Fpins=5Fe>; - pinctrl-1 =3D <&sdmmc2=5Fb4=5Fod=5Fpins=5Fa &sdmmc2=5Fd47=5Fpins=5Fe>; - pinctrl-2 =3D <&sdmmc2=5Fb4=5Fsleep=5Fpins=5Fa &sdmmc2=5Fd47=5Fsleep=5Fpi= ns=5Fe>; - non-removable; - no-sd; - no-sdio; - st,neg-edge; - bus-width =3D <8>; - vmmc-supply =3D <&v3v3>; - vqmmc-supply =3D <&v3v3>; - mmc-ddr-3=5F3v; -}; - &spi1 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&spi1=5Fpins=5Fa>; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/b= oot/dts/st/stm32mp15xx-phycore-som.dtsi new file mode 100644 index 000000000000..660cdc260963 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -0,0 +1,329 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved + * Author: Dom VOVARD + * Copyright (C) 2022-2023 Steffen Trumtrar + * Copyright (C) 2024 PHYTEC Messtechnik GmbH + * Author: Christophe Parant + */ + +#include +#include +#include +#include +#include "stm32mp15-pinctrl.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +/ { + + aliases { + ethernet0 =3D ðernet0; + rtc0 =3D &i2c4=5Frtc; + rtc1 =3D &rtc; + }; + + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + retram: retram@38000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x38000000 0x10000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x30000000 0x40000>; + no-map; + }; + + mcuram2: mcuram2@10000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x10040000 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10041000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x10041000 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10042000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x10042000 0x4000>; + no-map; + }; + }; + + regulator=5Fvin: regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vin"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + }; +}; + +ðernet0 { + pinctrl-0 =3D <ðernet0=5Frgmii=5Fpins=5Fd>; + pinctrl-1 =3D <ðernet0=5Frgmii=5Fsleep=5Fpins=5Fd>; + pinctrl-names =3D "default", "sleep"; + phy-mode =3D "rgmii-id"; + max-speed =3D <1000>; + phy-handle =3D <&phy0>; + st,eth-clk-sel; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy0: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + interrupt-parent =3D <&gpiog>; + interrupts =3D <12 IRQ=5FTYPE=5FEDGE=5FFALLING>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + ti,fifo-depth =3D ; + ti,min-output-impedance; + enet-phy-lane-no-swap; + ti,clk-output-sel =3D ; + }; + }; +}; + +&i2c4 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c4=5Fpins=5Fa>; + pinctrl-1 =3D <&i2c4=5Fsleep=5Fpins=5Fa>; + i2c-scl-rising-time-ns =3D <185>; + i2c-scl-falling-time-ns =3D <20>; + status =3D "okay"; + + pmic@33 { + compatible =3D "st,stpmic1"; + reg =3D <0x33>; + interrupts-extended =3D <&gpioa 0 IRQ=5FTYPE=5FEDGE=5FFALLING>; + interrupt-controller; + #interrupt-cells =3D <2>; + + regulators { + compatible =3D "st,stpmic1-regulators"; + buck1-supply =3D <®ulator=5Fvin>; + buck2-supply =3D <®ulator=5Fvin>; + buck3-supply =3D <®ulator=5Fvin>; + buck4-supply =3D <®ulator=5Fvin>; + ldo1-supply =3D <&v3v3>; + ldo2-supply =3D <&v3v3>; + ldo3-supply =3D <&vdd=5Fddr>; + ldo4-supply =3D <®ulator=5Fvin>; + ldo5-supply =3D <&v3v3>; + ldo6-supply =3D <&v3v3>; + boost-supply =3D <®ulator=5Fvin>; + pwr=5Fsw1-supply =3D <&bst=5Fout>; + pwr=5Fsw2-supply =3D <&bst=5Fout>; + + vddcore: buck1 { + regulator-name =3D "vddcore"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1350000>; + regulator-always-on; + regulator-initial-mode =3D <0>; + }; + + vdd=5Fddr: buck2 { + regulator-name =3D "vdd=5Fddr"; + regulator-min-microvolt =3D <1350000>; + regulator-max-microvolt =3D <1350000>; + regulator-always-on; + regulator-initial-mode =3D <0>; + }; + + vdd: buck3 { + regulator-name =3D "vdd"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + st,mask-reset; + regulator-initial-mode =3D <0>; + }; + + v3v3: buck4 { + regulator-name =3D "v3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + regulator-initial-mode =3D <0>; + }; + + v1v8=5Faudio: ldo1 { + regulator-name =3D "v1v8=5Faudio"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + interrupts =3D ; + + }; + + vdd=5Feth=5F2v5: ldo2 { + regulator-name =3D "dd=5Feth=5F2v5"; + regulator-min-microvolt =3D <2500000>; + regulator-max-microvolt =3D <2500000>; + regulator-always-on; + interrupts =3D ; + + }; + + vtt=5Fddr: ldo3 { + regulator-name =3D "vtt=5Fddr"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd=5Fusb: ldo4 { + regulator-name =3D "vdd=5Fusb"; + interrupts =3D ; + }; + + vdda: ldo5 { + regulator-name =3D "vdda"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + interrupts =3D ; + regulator-boot-on; + }; + + vdd=5Feth=5F1v0: ldo6 { + regulator-name =3D "vdd=5Feth=5F1v0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1000000>; + regulator-always-on; + interrupts =3D ; + + }; + + vref=5Fddr: vref=5Fddr { + regulator-name =3D "vref=5Fddr"; + regulator-always-on; + }; + + bst=5Fout: boost { + regulator-name =3D "bst=5Fout"; + interrupts =3D ; + }; + + vbus=5Fotg: pwr=5Fsw1 { + regulator-name =3D "vbus=5Fotg"; + interrupts =3D ; + regulator-active-discharge =3D <1>; + }; + + vbus=5Fsw: pwr=5Fsw2 { + regulator-name =3D "vbus=5Fsw"; + interrupts =3D ; + regulator-active-discharge =3D <1>; + }; + }; + + onkey { + compatible =3D "st,stpmic1-onkey"; + interrupts =3D , + ; + interrupt-names =3D "onkey-falling", + "onkey-rising"; + power-off-time-sec =3D <10>; + }; + + watchdog { + compatible =3D "st,stpmic1-wdt"; + }; + }; + + i2c4=5Feeprom: eeprom@50 { + compatible =3D "microchip,24c32", + "atmel,24c32"; + reg =3D <0x50>; + }; + + i2c4=5Frtc: rtc@52 { + compatible =3D "microcrystal,rv3028"; + reg =3D <0x52>; + }; +}; + +&ipcc { + status =3D "okay"; +}; + +&iwdg2 { + timeout-sec =3D <32>; + status =3D "okay"; +}; + +&m4=5Frproc { + memory-region =3D <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes =3D <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names =3D "vq0", "vq1", "shutdown", "detach"; + interrupt-parent =3D <&exti>; + interrupts =3D <68 1>; + status =3D "okay"; +}; + +&pwr=5Fregulators { + vdd-supply =3D <&vdd>; + vdd=5F3v3=5Fusbfs-supply =3D <&vdd=5Fusb>; +}; + +&qspi { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&qspi=5Fclk=5Fpins=5Fa &qspi=5Fbk1=5Fpins=5Fa>; + pinctrl-1 =3D <&qspi=5Fclk=5Fsleep=5Fpins=5Fa &qspi=5Fbk1=5Fsleep=5Fpins= =5Fa>; + status =3D "okay"; + + flash0: flash@0 { + compatible =3D "winbond,w25q128", "jedec,spi-nor"; + reg =3D <0>; + spi-rx-bus-width =3D <4>; + spi-max-frequency =3D <50000000>; + m25p,fast-read; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; +}; + +&rng1 { + status =3D "okay"; +}; + +&rtc { + status =3D "okay"; +}; + +&sdmmc2 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc2=5Fb4=5Fpins=5Fa &sdmmc2=5Fd47=5Fpins=5Fe>; + pinctrl-1 =3D <&sdmmc2=5Fb4=5Fod=5Fpins=5Fa &sdmmc2=5Fd47=5Fpins=5Fe>; + pinctrl-2 =3D <&sdmmc2=5Fb4=5Fsleep=5Fpins=5Fa &sdmmc2=5Fd47=5Fsleep=5Fpi= ns=5Fe>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width =3D <8>; + vmmc-supply =3D <&v3v3>; + vqmmc-supply =3D <&v3v3>; + mmc-ddr-3=5F3v; +}; --=20 2.34.1