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X-OriginatorOrg: phytec.fr X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Feb 2025 15:40:17.4797 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d1aa5a89-598e-49d2-622c-08dd57450934 X-MS-Exchange-CrossTenant-Id: e609157c-80e2-446d-9be3-9c99c2399d29 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e609157c-80e2-446d-9be3-9c99c2399d29;Ip=[91.26.50.189];Helo=[Diagnostix.phytec.de] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF0001C70E.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8P195MB0677 "memory" node is not necessary as the bootloader is taking care of passing the correct DDR size. However keep a dummy memory node with the minimum DDR size (512MB) with comment explaining that. Signed-off-by: Christophe Parant --- arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/b= oot/dts/st/stm32mp15xx-phycore-som.dtsi index 72926c3de52c..ce859b94ae26 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -22,6 +22,15 @@ aliases { rtc1 =3D &rtc; }; =20 + /* + * Set the minimum memory size here and + * let the bootloader set the real size. + */ + memory@c0000000 { + device=5Ftype =3D "memory"; + reg =3D <0xc0000000 0x20000000>; + }; + reserved-memory { #address-cells =3D <1>; #size-cells =3D <1>; --=20 2.34.1