From: "J. Neuschäfer via B4 Relay" <devnull+j.ne.posteo.net@kernel.org>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, "J. Neuschäfer" <j.ne@posteo.net>
Subject: [PATCH v2 2/3] dt-bindings: net: fsl,gianfar-mdio: Update information about TBI
Date: Fri, 28 Feb 2025 18:32:51 +0100 [thread overview]
Message-ID: <20250228-gianfar-yaml-v2-2-6beeefbd4818@posteo.net> (raw)
In-Reply-To: <20250228-gianfar-yaml-v2-0-6beeefbd4818@posteo.net>
From: "J. Neuschäfer" <j.ne@posteo.net>
When this binding was originally written, all known TSEC Ethernet
controllers had a Ten-Bit Interface (TBI). However, some datasheets such
as for the MPC8315E suggest that this is not universally true:
The eTSECs do not support TBI, GMII, and FIFO operating modes, so all
references to these interfaces and features should be ignored for this
device.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- Add Rob's Acked-by tag
---
Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
index 22369771c13614875845b6d6e6d6031b933cb152..03c819bc701be4e6bcae37891baccd4b01ec53c4 100644
--- a/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
@@ -11,13 +11,12 @@ description:
connected. For each device that exists on this bus, a child node should be
created.
- As of this writing, every TSEC is associated with an internal Ten-Bit
- Interface (TBI) PHY. This PHY is accessed through the local MDIO bus. These
- buses are defined similarly to the mdio buses, except they are compatible
- with "fsl,gianfar-tbi". The TBI PHYs underneath them are similar to normal
- PHYs, but the reg property is considered instructive, rather than
- descriptive. The reg property should be chosen so it doesn't interfere with
- other PHYs on the bus.
+ Some TSECs are associated with an internal Ten-Bit Interface (TBI) PHY. This
+ PHY is accessed through the local MDIO bus. These buses are defined similarly
+ to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI
+ PHYs underneath them are similar to normal PHYs, but the reg property is
+ considered instructive, rather than descriptive. The reg property should be
+ chosen so it doesn't interfere with other PHYs on the bus.
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
--
2.48.0.rc1.219.gb6b6757d772
next prev parent reply other threads:[~2025-02-28 17:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-28 17:32 [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML J. Neuschäfer via B4 Relay
2025-02-28 17:32 ` [PATCH v2 1/3] dt-bindings: net: Convert fsl,gianfar-{mdio,tbi} " J. Neuschäfer via B4 Relay
2025-02-28 22:02 ` Rob Herring (Arm)
2025-02-28 17:32 ` J. Neuschäfer via B4 Relay [this message]
2025-02-28 17:32 ` [PATCH v2 3/3] dt-bindings: net: Convert fsl,gianfar " J. Neuschäfer via B4 Relay
2025-02-28 22:08 ` Rob Herring (Arm)
2025-03-05 1:20 ` [PATCH v2 0/3] net: Convert Gianfar (Triple Speed Ethernet Controller) bindings " patchwork-bot+netdevbpf
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