From: Rob Herring <robh@kernel.org>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen Wang" <unicorn_wang@outlook.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Johan Hovold" <johan+linaro@kernel.org>,
"Shashank Babu Chinta Venkata" <quic_schintav@quicinc.com>,
"Niklas Cassel" <cassel@kernel.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, "Yixun Lan" <dlan@gentoo.org>,
"Longbin Li" <looong.bin@gmail.com>
Subject: Re: [PATCH 1/2] dt-bindings: pci: Add Sophgo SG2044 PCIe host
Date: Tue, 4 Mar 2025 09:10:09 -0600 [thread overview]
Message-ID: <20250304151009.GA2553244-robh@kernel.org> (raw)
In-Reply-To: <20250304071239.352486-2-inochiama@gmail.com>
On Tue, Mar 04, 2025 at 03:12:37PM +0800, Inochi Amaoto wrote:
> The pcie controller on the SG2044 is designware based with
> custom app registers.
>
> Add binding document for SG2044 PCIe host controller.
>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
> .../bindings/pci/sophgo,sg2044-pcie.yaml | 122 ++++++++++++++++++
> 1 file changed, 122 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml b/Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml
> new file mode 100644
> index 000000000000..2860d0f13146
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml
> @@ -0,0 +1,122 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/sophgo,sg2044-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: DesignWare based PCIe Root Complex controller on Sophgo SoCs
> +
> +maintainers:
> + - Inochi Amaoto <inochiama@gmail.com>
> +
> +description: |+
Don't need '|+' if no formatting to preserve.
With that,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-03-04 15:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-04 7:12 [PATCH 0/2] riscv: sophgo Add PCIe support to Sophgo SG2044 SoC Inochi Amaoto
2025-03-04 7:12 ` [PATCH 1/2] dt-bindings: pci: Add Sophgo SG2044 PCIe host Inochi Amaoto
2025-03-04 15:10 ` Rob Herring [this message]
2025-03-04 7:12 ` [PATCH 2/2] PCI: sophgo-dwc: Add Sophgo SG2044 PCIe driver Inochi Amaoto
2025-03-04 17:36 ` Bjorn Helgaas
2025-03-05 5:09 ` Inochi Amaoto
2025-03-04 23:57 ` Chen Wang
2025-03-05 5:18 ` Inochi Amaoto
2025-03-04 7:53 ` [PATCH 0/2] riscv: sophgo Add PCIe support to Sophgo SG2044 SoC Chen Wang
2025-03-04 7:59 ` Inochi Amaoto
-- strict thread matches above, loose matches on Subject: below --
2025-02-21 1:37 Inochi Amaoto
2025-02-21 1:37 ` [PATCH 1/2] dt-bindings: pci: Add Sophgo SG2044 PCIe host Inochi Amaoto
2025-02-21 17:01 ` Conor Dooley
2025-02-22 0:34 ` Inochi Amaoto
2025-02-24 18:54 ` Conor Dooley
2025-02-24 23:48 ` Inochi Amaoto
2025-02-25 23:35 ` Conor Dooley
2025-02-28 6:34 ` Inochi Amaoto
2025-02-28 8:46 ` Inochi Amaoto
2025-02-28 9:20 ` Inochi Amaoto
2025-03-03 17:04 ` Conor Dooley
2025-03-04 0:36 ` Inochi Amaoto
2025-03-05 4:43 ` Inochi Amaoto
2025-03-05 16:32 ` Conor Dooley
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