[PATCH 0/4] PCI: dwc: .cpu_addr_fixup() sketch

[Bjorn Helgaas <helgaas@kernel.org>]

From: Bjorn Helgaas <bhelgaas@google.com>

This is not complete or ready to merge at all.  It's just a sketch to see
if this approach to moving away from the .cpu_addr_fixup() approach is
feasible.

This is based on Frank's series at
https://lore.kernel.org/r/20250128-pci_fixup_addr-v9-0-3c4bb506f665@nxp.com,
and these apply on top of these patches from that series, which applies on
v6.15-rc1:

      PCI: dwc: Use resource start as iomap() input in dw_pcie_pme_turn_off()
      PCI: dwc: Rename cpu_addr to parent_bus_addr for ATU configuration
      PCI: Add parent_bus_offset to resource_entry

The idea is that on some systems the PCI controller lives in a different
address space (an "intermediate" address space) than the CPU physical
address space.  Frank has a beautiful picture of this at
https://lore.kernel.org/r/20250128-pci_fixup_addr-v9-4-3c4bb506f665@nxp.com

The devicetree *should* describe the fabric address translation between the
CPU and intermediate address spaces, but historically we haven't taken
advantage of that and have used .cpu_addr_fixup() functions to convert CPU
to intermediate addresses each time we program the ATU.

What I tried to do here was to:

  - Try to extract the offset from devicetree using the 'reg' property
    (this is from Frank's patch at the link above)

  - If a .cpu_addr_fixup() function exists, run that as well and compare
    with the offset from devicetree

  - Save the offset in struct dw_pcie_rp and apply that instead of calling
    .cpu_addr_fixup() in the future

  - Emit messages about devicetree offsets that don't match what
    .cpu_addr_fixup() did, or about .cpu_addr_fixup() methods that are
    superfluous because they *do* match the devicetree offset

I only looked at the RC side and didn't do anything at all with the EP
side.

Bjorn Helgaas (4):
  PCI: dwc: Move cfg0 setup to dw_pcie_cfg0_setup()
  PCI: dwc: Delay cfg0 setup until after discovering bridge windows
  PCI: dwc: Look up 'config' address
  PCI: dwc: Use parent_bus_offset

 .../pci/controller/dwc/pcie-designware-host.c | 88 +++++++++++++++----
 drivers/pci/controller/dwc/pcie-designware.c  |  3 -
 drivers/pci/controller/dwc/pcie-designware.h  |  1 +
 3 files changed, 72 insertions(+), 20 deletions(-)

-- 
2.34.1