Re: [PATCH 4/4 v3] cxl/test: Simulate an x86 Low Memory Hole for tests

Robert Richter
2025-03-28T10:52:12Z

On 26.03.25 17:58:50, Fabio M. De Francesco wrote:
> On Friday, March 21, 2025 11:42:09 AM Central European Standard Time Robert Richter wrote:
> > On 14.03.25 12:36:33, Fabio M. De Francesco wrote:
> > > Simulate an x86 Low Memory Hole for the CXL tests by changing the first
> > > mock CFMWS range size to 768MB and the CXL Endpoint Decoder HPA range sizes
> > > to 1GB.
> > >
> > > Since the auto-created region of cxl-test uses mock_cfmws[0], whose range
> > > base address is typically different from the one published by the BIOS on
> > > real hardware, the driver would fail to create and attach CXL Regions if
> > > it was run on the mock environment created by cxl-tests.
> > >
> > > Therefore, save the mock_cfmsw[0] range base_hpa and reuse it to match CXL
> > > Root Decoders and Regions with Endpoint Decoders when the driver is run on
> > > mock devices.
> > >
> > > Since the auto-created region of cxl-test uses mock_cfmws[0], the
> > > LMH path in the CXL Driver will be exercised every time the cxl-test
> > > module is loaded. Executing unit test: cxl-topology.sh, confirms the
> > > region created successfully with a LMH.
> > >
> > > Cc: Alison Schofield <alison.schofield@intel.com>
> > > Cc: Dan Williams <dan.j.williams@intel.com>
> > > Cc: Ira Weiny <ira.weiny@intel.com>
> > > Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
> > > ---
> > > drivers/cxl/core/lmh.c | 35 ++++++++++++++++++++++++----
> > > drivers/cxl/core/lmh.h | 2 ++
> >
> > Can you take a look to move all those changes to testing/? This
> > indicates the interface of your mock functions need improvement.
> >
> > -Robert
> >
> > > tools/testing/cxl/cxl_core_exports.c | 2 ++
> > > tools/testing/cxl/test/cxl.c | 10 ++++++++
> > > 4 files changed, 45 insertions(+), 4 deletions(-)
> >
> Your comment is not very detailed but I think you are suggesting to
> override the lmh functions in testing. If that is the case, I don't think
> that any function which is exported from and also called by cxl-core
> can be override by testing with the strong/weak mechanism.

I think you need to modify cxl_test to create a LMH hole (register a
mock bridge and root port with the necessary parameters, etc.) and
then run cxl_core unmodified.

-Robert

>
> But I'm not an expert of linker related topics and not even sure that I
> understood what you suggested.
>
> Would you please elaborate more?
>
> Thanks,
>
> Fabio