Re: [PATCH] iio: frequency: ad9832: Use FIELD_PREP macro to set bit fields

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Fri, 14 Mar 2025 01:24:17 +0530
Siddharth Menon <simeddon@gmail.com> wrote:

> Refactor code to use the FIELD_PREP macro for setting bit fields
> instead of manual bit manipulation.
> 
> Suggested-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
> Signed-off-by: Siddharth Menon <simeddon@gmail.com>
> ---
>  drivers/staging/iio/frequency/ad9832.c | 39 ++++++++++++++------------
>  1 file changed, 21 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c
> index 140ee4f9c137..bbde1f0e84ff 100644
> --- a/drivers/staging/iio/frequency/ad9832.c
> +++ b/drivers/staging/iio/frequency/ad9832.c
> @@ -70,6 +70,9 @@
>  #define AD9832_FREQ_BITS	32
>  #define AD9832_PHASE_BITS	12
>  #define RES_MASK(bits)		((1 << (bits)) - 1)
> +#define DATA_MASK       0xFF
> +#define CMD_MASK        (0xF << CMD_SHIFT)
> +#define ADD_MASK        (0xF << ADD_SHIFT)
Don't mix and match.  If we can't get rid of CMD_SHIFT then
this is not worth ti.

Ideally should end up with
#define AD9832_CMD_MSK 0xF000
#define AD9832_ADD_MSK 0x0F00


>  
>  /**
>   * struct ad9832_state - driver instance specific data
> @@ -139,18 +142,18 @@ static int ad9832_write_frequency(struct ad9832_state *st,
>  
>  	regval = ad9832_calc_freqreg(clk_freq, fout);
>  
> -	st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) |
> -					(addr << ADD_SHIFT) |
> -					((regval >> 24) & 0xFF));
> -	st->freq_data[1] = cpu_to_be16((AD9832_CMD_FRE16BITSW << CMD_SHIFT) |
> -					((addr - 1) << ADD_SHIFT) |
> -					((regval >> 16) & 0xFF));
> -	st->freq_data[2] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) |
> -					((addr - 2) << ADD_SHIFT) |
> -					((regval >> 8) & 0xFF));
> -	st->freq_data[3] = cpu_to_be16((AD9832_CMD_FRE16BITSW << CMD_SHIFT) |
> -					((addr - 3) << ADD_SHIFT) |
> -					((regval >> 0) & 0xFF));
> +	st->freq_data[0] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_FRE8BITSW) |
> +					FIELD_PREP(ADD_MASK, addr) |
> +					FIELD_PREP(DATA_MASK, (regval >> 24) & 0xFF));
> +	st->freq_data[1] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_FRE16BITSW) |
> +					FIELD_PREP(ADD_MASK, (addr - 1)) |
> +					FIELD_PREP(DATA_MASK, (regval >> 16) & 0xFF));
> +	st->freq_data[2] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_FRE8BITSW) |
> +					FIELD_PREP(ADD_MASK, (addr - 2)) |
> +					FIELD_PREP(DATA_MASK, (regval >> 8) & 0xFF));
> +	st->freq_data[3] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_FRE16BITSW) |
> +					FIELD_PREP(ADD_MASK, (addr - 3)) |
> +					FIELD_PREP(DATA_MASK, (regval >> 0) & 0xFF));

These are doing a byte wise write. Instead of this regval shifting madness look
at converting to array with appropriate unaligned_put_be32
then a loop to do this.


>  
>  	return spi_sync(st->spi, &st->freq_msg);
>  }
> @@ -161,12 +164,12 @@ static int ad9832_write_phase(struct ad9832_state *st,
>  	if (phase >= BIT(AD9832_PHASE_BITS))
>  		return -EINVAL;
>  
> -	st->phase_data[0] = cpu_to_be16((AD9832_CMD_PHA8BITSW << CMD_SHIFT) |
> -					(addr << ADD_SHIFT) |
> -					((phase >> 8) & 0xFF));
> -	st->phase_data[1] = cpu_to_be16((AD9832_CMD_PHA16BITSW << CMD_SHIFT) |
> -					((addr - 1) << ADD_SHIFT) |
> -					(phase & 0xFF));
> +	st->phase_data[0] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_PHA8BITSW) |
> +					FIELD_PREP(ADD_MASK, addr) |
> +					FIELD_PREP(DATA_MASK, (phase >> 8) & 0xFF));
> +	st->phase_data[1] = cpu_to_be16(FIELD_PREP(CMD_MASK, AD9832_CMD_PHA16BITSW) |
> +					FIELD_PREP(ADD_MASK, (addr - 1)) |
> +					FIELD_PREP(DATA_MASK, phase & 0xFF));
>  
>  	return spi_sync(st->spi, &st->phase_msg);
>  }