From: "Michał Pecio" <michal.pecio@gmail.com>
To: ki.chiang65@gmail.com
Cc: gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org,
linux-usb@vger.kernel.org, mathias.nyman@intel.com
Subject: Re: [PATCH v4 0/1] xhci: Some improvement for Etron xHCI host
Date: Mon, 17 Mar 2025 11:12:03 +0100 [thread overview]
Message-ID: <20250317111203.03a12ec8@foxbook> (raw)
In-Reply-To: <20250205053750.28251-1-ki.chiang65@gmail.com>
Hi again.
> To prevent the xHCI driver from printing a "Transfer event TRB DMA
> ptr not part of current TD" error message when an error is detected
> while processing the last TRB of an isoc TD:
> xhci: Correctly handle last TRB of isoc TD on Etron xHCI host
By the way, do you have other problems with your Etrons trying to run
SuperSpeed isochronous endpoints? Mine doesn't work at altsettings with
non-power-of-two ESIT payload very well.
rmmod uvcvideo ; modprobe uvcvideo trace=0x400
causes the selected altsetting to be printed to dmesg. Choosing some
video resolutions results in non-power-of-two altsetting which works
on other HCs, but causes visible image corruption and errors on Etron:
[ +5.514779] usb 7-1: Device requested 7332 B/frame bandwidth
[ +0.000016] usb 7-1: Selecting alternate setting 8 (12288 B/frame bandwidth)
[ +0.002647] usb 7-1: Allocated 5 URB buffers of 32x12288 bytes each
[ +0.148160] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.003382] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.000621] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.003380] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.000614] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.003388] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
[ +0.000609] xhci_hcd 0000:06:00.0: WARN: bandwidth overrun event for slot 1 ep 2 on endpoint
As far as I'm able to tell, the problem is caused by multi-TRB TDs
completeing with Short Packet on the first TRB. Then it kinda looks
like the stupid chip assumes that the second TRB is a new TD, adds
the actual TRB of the next TD to it and finds that the resulting TD
is too long, so it rejects it with BW Overrun error.
I wonder if it's something unique to my chip (maybe FW revision?) or
a general rule with those buggy things.
Thanks,
Michal
prev parent reply other threads:[~2025-03-17 10:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-05 5:37 [PATCH v4 0/1] xhci: Some improvement for Etron xHCI host Kuangyi Chiang
2025-02-05 5:37 ` [PATCH v4 1/1] xhci: Correctly handle last TRB of isoc TD on " Kuangyi Chiang
2025-02-05 14:17 ` Mathias Nyman
2025-02-05 15:17 ` Mathias Nyman
2025-02-07 1:38 ` Kuangyi Chiang
2025-02-10 6:09 ` Kuangyi Chiang
2025-02-05 22:42 ` Michał Pecio
2025-02-07 12:06 ` Mathias Nyman
2025-02-10 8:57 ` Michał Pecio
2025-02-11 12:36 ` [PATCH] usb: xhci: Handle quirky SuperSpeed isoc error reporting by Etron HCs Michal Pecio
2025-02-12 5:59 ` Kuangyi Chiang
2025-02-12 8:12 ` Michał Pecio
2025-02-28 16:13 ` Mathias Nyman
2025-02-28 16:18 ` [RFT PATCH] xhci: Handle spurious events on Etron host isoc enpoints Mathias Nyman
2025-02-28 19:57 ` kernel test robot
2025-02-28 20:07 ` kernel test robot
2025-03-01 2:05 ` Kuangyi Chiang
2025-03-03 3:29 ` Kuangyi Chiang
2025-03-03 8:28 ` Mathias Nyman
2025-03-03 10:34 ` Michał Pecio
2025-03-03 15:08 ` Mathias Nyman
2025-03-06 8:50 ` Michał Pecio
2025-02-28 17:11 ` [PATCH] usb: xhci: Handle quirky SuperSpeed isoc error reporting by Etron HCs Michał Pecio
2025-02-28 17:14 ` Michał Pecio
2025-02-07 1:28 ` [PATCH v4 1/1] xhci: Correctly handle last TRB of isoc TD on Etron xHCI host Kuangyi Chiang
2025-02-05 21:45 ` Michał Pecio
2025-02-07 6:59 ` Kuangyi Chiang
2025-02-07 9:51 ` Michał Pecio
2025-02-10 6:18 ` Kuangyi Chiang
2025-03-17 10:12 ` Michał Pecio [this message]
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