Re: [PATCH 2/2] x86/bitops: Fix false output register dependency of TZCNT insn

Ingo Molnar
2025-03-25T21:43:33Z

* Uros Bizjak <ubizjak@gmail.com> wrote:

> On Haswell and later Intel processors, the TZCNT instruction appears
> to have a false dependency on the destination register. Even though
> the instruction only writes to it, the instruction will wait until
> destination is ready before executing. This false dependency
> was fixed for Skylake (and later) processors.
>
> Fix false dependency by clearing the destination register first.
>
> The x86_64 defconfig object size increases by 4215 bytes:
>
> text data bss dec hex filename
> 27342396 4642999 814852 32800247 1f47df7 vmlinux-old.o
> 27346611 4643015 814852 32804478 1f48e7e vmlinux-new.o

Yeah, so Skylake was released in 2015, about a decade ago.

So we'd be making the kernel larger for an unquantified
micro-optimization for CPUs that almost nobody uses anymore.
That's a bad trade-off.

Thanks,

Ingo