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There is a preference for sysfs/JSON events being the priority when no PMU is provided so that legacy events maybe supported via json. Originally Mark Rutland also expressed at LPC 2023 that doing this would resolve bugs on ARM Apple M? processors, but James Clark more recently tested this and believes the driver issues there may not have existed or have been resolved. In any case, it is inconsistent that with a PMU event names avoid legacy encodings, but when wildcarding PMUs (ie without a PMU with the event name) the legacy encodings have priority. The situation is further inconsistent as legacy events are case sensitive, so on Intel that provides a sysfs instructions event, the instructions event without a PMU and lowercase is legacy while with uppercase letters it matches with sysfs which is case insensitive. Are there legacy events with upper case letters? Yes there are, the cache ones mix case freely: L1-dcache|l1-d|l1d|L1-data|L1-icache|l1-i|l1i|L1-instruction|LLC|L2|dTLB|d-tlb|Data-TLB|iTLB|i-tlb|Instruction-TLB|branch|branches|bpu|btb|bpc|node meaning LLC that means L2 (which is wrong) both match as part of a legacy cache name but llc and l2 would only match sysfs/json events. The whole thing just points at the ridiculous nature of legacy events and why we'd want them to be preffered I don't know. Why should case of a letter or having a PMU prefix impact the encoding in the perf_event_attr? The patch doing this work was reverted in a v6.10 release candidate as, even though the patch was posted for weeks and had been on linux-next for weeks without issue, Linus was in the habit of using explicit legacy events with unsupported precision options on his Neoverse-N1. This machine has SLC PMU events for bus and CPU cycles where ARM decided to call the events bus_cycles and cycles, the latter being also a legacy event name. ARM haven't renamed the cycles event to a more consistent cpu_cycles and avoided the problem. With these changes the problematic event will now be skipped, a large warning produced, and perf record will continue for the other PMU events. This solution was proposed by Arnaldo. v7: Expand cover letter, fix a missed core_ok check in the v6 rebase. Note, as with v6 there is an alternate series that prioritizes legacy events but that is silly and I'd prefer we didn't do it. v6: Rebase of v5 (dropping already merged patches): https://lore.kernel.org/lkml/20250109222109.567031-1-irogers@google.com/ that unusually had an RFC posted for it: https://lore.kernel.org/lkml/Z7Z5kv75BMML2A1q@google.com/ Note, this patch conflicts/contradicts: https://lore.kernel.org/lkml/20250312211623.2495798-1-irogers@google.com/ that I posted so that we could either consistently prioritize sysfs/json (these patches) or legacy events (the other patches). That lack of event printing and encoding inconsistency is most prominent in the encoding of events like "instructions" which on hybrid are reported as "cpu_core/instructions/" but "instructions" before these patches gets a legacy encoding while "cpu_core/instructions/" gets a sysfs/json encoding. These patches make "instructions" always get a sysfs/json encoding while the alternate patches make it always get a legacy encoding. v5: Follow Namhyung's suggestion and ignore the case where command line dummy events fail to open alongside other events that all fail to open. Note, the Tested-by tags are left on the series as v4 and v5 were changing an error case that doesn't occur in testing but was manually tested by myself. v4: Rework the no events opening change from v3 to make it handle multiple dummy events. Sadly an evlist isn't empty if it just contains dummy events as the dummy event may be used with "perf record -e dummy .." as a way to determine whether permission issues exist. Other software events like cpu-clock would suffice for this, but the using dummy genie has left the bottle. Another problem is that we appear to have an excessive number of dummy events added, for example, we can likely avoid a dummy event and add sideband data to the original event. For auxtrace more dummy events may be opened too. Anyway, this has led to the approach taken in patch 3 where the number of dummy parsed events is computed. If the number of removed/failing-to-open non-dummy events matches the number of non-dummy events then we want to fail, but only if there are no parsed dummy events or if there was one then it must have opened. The math here is hard to read, but passes my manual testing. v3: Make no events opening for perf record a failure as suggested by James Clark and Aditya Bodkhe . Also, rebase. v2: Rebase and add tested-by tags from James Clark, Leo Yan and Atish Patra who have tested on RISC-V and ARM CPUs, including the problem case from before. Ian Rogers (2): perf record: Skip don't fail for events that don't open perf parse-events: Reapply "Prefer sysfs/JSON hardware events over legacy" tools/perf/builtin-record.c | 47 ++++++++++++++++++--- tools/perf/util/parse-events.c | 27 +++++++++--- tools/perf/util/parse-events.l | 76 +++++++++++++++++----------------- tools/perf/util/parse-events.y | 60 ++++++++++++++++++--------- 4 files changed, 140 insertions(+), 70 deletions(-) -- 2.49.0.504.g3bcea36a83-goog