[PATCH v2 0/3] drm/panfrost: enable G31 on H616

[PATCH v2 0/3] drm/panfrost: enable G31 on H616

[Philippe Simons]

Allwinner H616 has a dedicated power domain for its Mali G31.

Currently after probe, the GPU is put in runtime suspend which 
disable the power domain.
On first usage of GPU, the power domain enable hangs the system.

This series adds the necessary calls to enable the clocks and
deasserting the reset line after the power domain enabling and
asserting the reset line and disabling the clocks prior to the
power domain disabling.

This allows to use the Mali GPU on all Allwinner H616
boards and devices.

Changelog v1 .. v2:
- merge flags to a single GPU_PM_RT flag
- reorder init/deinit powerup/down sequences according to
  Mali manuals.
Link to v1:
https://lore.kernel.org/linux-sunxi/20250312232319.25712-1-simons.philippe@gmail.com/

Philippe Simons (3):
  drm/panfrost: Add PM runtime flag
  drm/panfrost: add h616 compatible string
  drm/panfrost: reorder pd/clk/rst sequence

 drivers/gpu/drm/panfrost/panfrost_device.c | 71 ++++++++++++++++------
 drivers/gpu/drm/panfrost/panfrost_device.h |  3 +
 drivers/gpu/drm/panfrost/panfrost_drv.c    |  8 +++
 3 files changed, 63 insertions(+), 19 deletions(-)


base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
prerequisite-patch-id: eb8a11e2b24bb282970d8b8528834dea7ee392cc
-- 
2.49.0

[PATCH v2 1/3] drm/panfrost: Add PM runtime flag

[Philippe Simons]

When the GPU is the only device attached to a single power domain,
core genpd disable and enable it when gpu enter and leave runtime suspend.

Some power-domain requires a sequence before disabled,
and the reverse when enabled.

Add GPU_PM_RT flag, and implement in
panfrost_device_runtime_suspend/resume.

Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Philippe Simons <simons.philippe@gmail.com>
---
 drivers/gpu/drm/panfrost/panfrost_device.c | 33 ++++++++++++++++++++++
 drivers/gpu/drm/panfrost/panfrost_device.h |  3 ++
 2 files changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
index a45e4addcc19..93d48e97ce10 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.c
+++ b/drivers/gpu/drm/panfrost/panfrost_device.c
@@ -406,11 +406,36 @@ void panfrost_device_reset(struct panfrost_device *pfdev)
 static int panfrost_device_runtime_resume(struct device *dev)
 {
 	struct panfrost_device *pfdev = dev_get_drvdata(dev);
+	int ret;
+
+	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
+		ret = reset_control_deassert(pfdev->rstc);
+		if (ret)
+			return ret;
+
+		ret = clk_enable(pfdev->clock);
+		if (ret)
+			goto err_clk;
+
+		if (pfdev->bus_clock) {
+			ret = clk_enable(pfdev->bus_clock);
+			if (ret)
+				goto err_bus_clk;
+		}
+	}
 
 	panfrost_device_reset(pfdev);
 	panfrost_devfreq_resume(pfdev);
 
 	return 0;
+
+err_bus_clk:
+	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
+		clk_disable(pfdev->clock);
+err_clk:
+	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
+		reset_control_assert(pfdev->rstc);
+	return ret;
 }
 
 static int panfrost_device_runtime_suspend(struct device *dev)
@@ -426,6 +451,14 @@ static int panfrost_device_runtime_suspend(struct device *dev)
 	panfrost_gpu_suspend_irq(pfdev);
 	panfrost_gpu_power_off(pfdev);
 
+	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
+		if (pfdev->bus_clock)
+			clk_disable(pfdev->bus_clock);
+
+		clk_disable(pfdev->clock);
+		reset_control_assert(pfdev->rstc);
+	}
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
index cffcb0ac7c11..861555ceea65 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.h
+++ b/drivers/gpu/drm/panfrost/panfrost_device.h
@@ -36,10 +36,13 @@ enum panfrost_drv_comp_bits {
  * enum panfrost_gpu_pm - Supported kernel power management features
  * @GPU_PM_CLK_DIS:  Allow disabling clocks during system suspend
  * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend
+ * @GPU_PM_RT: Allow disabling clocks and asserting the reset control during
+ *  system runtime suspend
  */
 enum panfrost_gpu_pm {
 	GPU_PM_CLK_DIS,
 	GPU_PM_VREG_OFF,
+	GPU_PM_RT
 };
 
 struct panfrost_features {
-- 
2.49.0

[PATCH v2 2/3] drm/panfrost: add h616 compatible string

[Philippe Simons]

Tie the Allwinner compatible string to the GPU_PM_RT feature bits that will
toggle the clocks and the reset line whenever the power domain is changing
state.

Signed-off-by: Philippe Simons <simons.philippe@gmail.com>
---
 drivers/gpu/drm/panfrost/panfrost_drv.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 0f3935556ac7..9470c04c5487 100644
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -776,6 +776,13 @@ static const struct panfrost_compatible default_data = {
 	.pm_domain_names = NULL,
 };
 
+static const struct panfrost_compatible allwinner_h616_data = {
+	.num_supplies = ARRAY_SIZE(default_supplies) - 1,
+	.supply_names = default_supplies,
+	.num_pm_domains = 1,
+	.pm_features = BIT(GPU_PM_RT),
+};
+
 static const struct panfrost_compatible amlogic_data = {
 	.num_supplies = ARRAY_SIZE(default_supplies) - 1,
 	.supply_names = default_supplies,
@@ -859,6 +866,7 @@ static const struct of_device_id dt_match[] = {
 	{ .compatible = "mediatek,mt8186-mali", .data = &mediatek_mt8186_data },
 	{ .compatible = "mediatek,mt8188-mali", .data = &mediatek_mt8188_data },
 	{ .compatible = "mediatek,mt8192-mali", .data = &mediatek_mt8192_data },
+	{ .compatible = "allwinner,sun50i-h616-mali", .data = &allwinner_h616_data },
 	{}
 };
 MODULE_DEVICE_TABLE(of, dt_match);
-- 
2.49.0

[PATCH v2 3/3] drm/panfrost: reorder pd/clk/rst sequence

[Philippe Simons]

According to Mali manuals, the powerup sequence should be
enable pd, asserting the reset then enabling the clock and
the reverse for powerdown.

Signed-off-by: Philippe Simons <simons.philippe@gmail.com>
---
 drivers/gpu/drm/panfrost/panfrost_device.c | 38 +++++++++++-----------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
index 93d48e97ce10..5d35076b2e6d 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.c
+++ b/drivers/gpu/drm/panfrost/panfrost_device.c
@@ -209,10 +209,20 @@ int panfrost_device_init(struct panfrost_device *pfdev)
 
 	spin_lock_init(&pfdev->cycle_counter.lock);
 
+	err = panfrost_pm_domain_init(pfdev);
+	if (err)
+		return err;
+
+	err = panfrost_reset_init(pfdev);
+	if (err) {
+		dev_err(pfdev->dev, "reset init failed %d\n", err);
+		goto out_pm_domain;
+	}
+
 	err = panfrost_clk_init(pfdev);
 	if (err) {
 		dev_err(pfdev->dev, "clk init failed %d\n", err);
-		return err;
+		goto out_reset;
 	}
 
 	err = panfrost_devfreq_init(pfdev);
@@ -229,25 +239,15 @@ int panfrost_device_init(struct panfrost_device *pfdev)
 			goto out_devfreq;
 	}
 
-	err = panfrost_reset_init(pfdev);
-	if (err) {
-		dev_err(pfdev->dev, "reset init failed %d\n", err);
-		goto out_regulator;
-	}
-
-	err = panfrost_pm_domain_init(pfdev);
-	if (err)
-		goto out_reset;
-
 	pfdev->iomem = devm_platform_ioremap_resource(pfdev->pdev, 0);
 	if (IS_ERR(pfdev->iomem)) {
 		err = PTR_ERR(pfdev->iomem);
-		goto out_pm_domain;
+		goto out_regulator;
 	}
 
 	err = panfrost_gpu_init(pfdev);
 	if (err)
-		goto out_pm_domain;
+		goto out_regulator;
 
 	err = panfrost_mmu_init(pfdev);
 	if (err)
@@ -268,16 +268,16 @@ int panfrost_device_init(struct panfrost_device *pfdev)
 	panfrost_mmu_fini(pfdev);
 out_gpu:
 	panfrost_gpu_fini(pfdev);
-out_pm_domain:
-	panfrost_pm_domain_fini(pfdev);
-out_reset:
-	panfrost_reset_fini(pfdev);
 out_regulator:
 	panfrost_regulator_fini(pfdev);
 out_devfreq:
 	panfrost_devfreq_fini(pfdev);
 out_clk:
 	panfrost_clk_fini(pfdev);
+out_reset:
+	panfrost_reset_fini(pfdev);
+out_pm_domain:
+	panfrost_pm_domain_fini(pfdev);
 	return err;
 }
 
@@ -287,11 +287,11 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
 	panfrost_job_fini(pfdev);
 	panfrost_mmu_fini(pfdev);
 	panfrost_gpu_fini(pfdev);
-	panfrost_pm_domain_fini(pfdev);
-	panfrost_reset_fini(pfdev);
 	panfrost_devfreq_fini(pfdev);
 	panfrost_regulator_fini(pfdev);
 	panfrost_clk_fini(pfdev);
+	panfrost_reset_fini(pfdev);
+	panfrost_pm_domain_fini(pfdev);
 }
 
 #define PANFROST_EXCEPTION(id) \
-- 
2.49.0

Re: [PATCH v2 3/3] drm/panfrost: reorder pd/clk/rst sequence

[John Williams]

I have regression tested this patch on the following devices:

Powkiddy RGB10X - Rockchip RK3326 (Mali G31)

Powkiddy RGB20 Pro - Rockchip RK3566 (Mali G52)

Odroid Go Ultra - Amlogic S922X (Mali G52)

Gameforce ACE - Rockchip RK3588S (Mali G610)

No regressions found during cold boot or with wake after sleep.

Tested-by: John Williams <porschemad911@gmail.com>

On 3/4/25 16:52, Philippe Simons wrote:
> According to Mali manuals, the powerup sequence should be
> enable pd, asserting the reset then enabling the clock and
> the reverse for powerdown.
>
> Signed-off-by: Philippe Simons <simons.philippe@gmail.com>
> ---
>   drivers/gpu/drm/panfrost/panfrost_device.c | 38 +++++++++++-----------
>   1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index 93d48e97ce10..5d35076b2e6d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -209,10 +209,20 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   
>   	spin_lock_init(&pfdev->cycle_counter.lock);
>   
> +	err = panfrost_pm_domain_init(pfdev);
> +	if (err)
> +		return err;
> +
> +	err = panfrost_reset_init(pfdev);
> +	if (err) {
> +		dev_err(pfdev->dev, "reset init failed %d\n", err);
> +		goto out_pm_domain;
> +	}
> +
>   	err = panfrost_clk_init(pfdev);
>   	if (err) {
>   		dev_err(pfdev->dev, "clk init failed %d\n", err);
> -		return err;
> +		goto out_reset;
>   	}
>   
>   	err = panfrost_devfreq_init(pfdev);
> @@ -229,25 +239,15 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   			goto out_devfreq;
>   	}
>   
> -	err = panfrost_reset_init(pfdev);
> -	if (err) {
> -		dev_err(pfdev->dev, "reset init failed %d\n", err);
> -		goto out_regulator;
> -	}
> -
> -	err = panfrost_pm_domain_init(pfdev);
> -	if (err)
> -		goto out_reset;
> -
>   	pfdev->iomem = devm_platform_ioremap_resource(pfdev->pdev, 0);
>   	if (IS_ERR(pfdev->iomem)) {
>   		err = PTR_ERR(pfdev->iomem);
> -		goto out_pm_domain;
> +		goto out_regulator;
>   	}
>   
>   	err = panfrost_gpu_init(pfdev);
>   	if (err)
> -		goto out_pm_domain;
> +		goto out_regulator;
>   
>   	err = panfrost_mmu_init(pfdev);
>   	if (err)
> @@ -268,16 +268,16 @@ int panfrost_device_init(struct panfrost_device *pfdev)
>   	panfrost_mmu_fini(pfdev);
>   out_gpu:
>   	panfrost_gpu_fini(pfdev);
> -out_pm_domain:
> -	panfrost_pm_domain_fini(pfdev);
> -out_reset:
> -	panfrost_reset_fini(pfdev);
>   out_regulator:
>   	panfrost_regulator_fini(pfdev);
>   out_devfreq:
>   	panfrost_devfreq_fini(pfdev);
>   out_clk:
>   	panfrost_clk_fini(pfdev);
> +out_reset:
> +	panfrost_reset_fini(pfdev);
> +out_pm_domain:
> +	panfrost_pm_domain_fini(pfdev);
>   	return err;
>   }
>   
> @@ -287,11 +287,11 @@ void panfrost_device_fini(struct panfrost_device *pfdev)
>   	panfrost_job_fini(pfdev);
>   	panfrost_mmu_fini(pfdev);
>   	panfrost_gpu_fini(pfdev);
> -	panfrost_pm_domain_fini(pfdev);
> -	panfrost_reset_fini(pfdev);
>   	panfrost_devfreq_fini(pfdev);
>   	panfrost_regulator_fini(pfdev);
>   	panfrost_clk_fini(pfdev);
> +	panfrost_reset_fini(pfdev);
> +	panfrost_pm_domain_fini(pfdev);
>   }
>   
>   #define PANFROST_EXCEPTION(id) \

Re: [PATCH v2 0/3] drm/panfrost: enable G31 on H616

[Philippe Simons]

Hi, is there any issue with this serie

Thanks,

Philippe

On 4/3/25 07:52, Philippe Simons wrote:
> Allwinner H616 has a dedicated power domain for its Mali G31.
>
> Currently after probe, the GPU is put in runtime suspend which
> disable the power domain.
> On first usage of GPU, the power domain enable hangs the system.
>
> This series adds the necessary calls to enable the clocks and
> deasserting the reset line after the power domain enabling and
> asserting the reset line and disabling the clocks prior to the
> power domain disabling.
>
> This allows to use the Mali GPU on all Allwinner H616
> boards and devices.
>
> Changelog v1 .. v2:
> - merge flags to a single GPU_PM_RT flag
> - reorder init/deinit powerup/down sequences according to
>    Mali manuals.
> Link to v1:
> https://lore.kernel.org/linux-sunxi/20250312232319.25712-1-simons.philippe@gmail.com/
>
> Philippe Simons (3):
>    drm/panfrost: Add PM runtime flag
>    drm/panfrost: add h616 compatible string
>    drm/panfrost: reorder pd/clk/rst sequence
>
>   drivers/gpu/drm/panfrost/panfrost_device.c | 71 ++++++++++++++++------
>   drivers/gpu/drm/panfrost/panfrost_device.h |  3 +
>   drivers/gpu/drm/panfrost/panfrost_drv.c    |  8 +++
>   3 files changed, 63 insertions(+), 19 deletions(-)
>
>
> base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
> prerequisite-patch-id: eb8a11e2b24bb282970d8b8528834dea7ee392cc

Re: [PATCH v2 0/3] drm/panfrost: enable G31 on H616

[Steven Price]

On 28/04/2025 07:10, Philippe Simons wrote:
> Hi, is there any issue with this serie

Hi,

Sorry, no nothing wrong - it's just slipped through. Thanks for the
reminder. I've applied it to drm-misc-next.

Thanks,
Steve

> Thanks,
> 
> Philippe
> 
> On 4/3/25 07:52, Philippe Simons wrote:
>> Allwinner H616 has a dedicated power domain for its Mali G31.
>>
>> Currently after probe, the GPU is put in runtime suspend which
>> disable the power domain.
>> On first usage of GPU, the power domain enable hangs the system.
>>
>> This series adds the necessary calls to enable the clocks and
>> deasserting the reset line after the power domain enabling and
>> asserting the reset line and disabling the clocks prior to the
>> power domain disabling.
>>
>> This allows to use the Mali GPU on all Allwinner H616
>> boards and devices.
>>
>> Changelog v1 .. v2:
>> - merge flags to a single GPU_PM_RT flag
>> - reorder init/deinit powerup/down sequences according to
>>    Mali manuals.
>> Link to v1:
>> https://lore.kernel.org/linux-sunxi/20250312232319.25712-1-
>> simons.philippe@gmail.com/
>>
>> Philippe Simons (3):
>>    drm/panfrost: Add PM runtime flag
>>    drm/panfrost: add h616 compatible string
>>    drm/panfrost: reorder pd/clk/rst sequence
>>
>>   drivers/gpu/drm/panfrost/panfrost_device.c | 71 ++++++++++++++++------
>>   drivers/gpu/drm/panfrost/panfrost_device.h |  3 +
>>   drivers/gpu/drm/panfrost/panfrost_drv.c    |  8 +++
>>   3 files changed, 63 insertions(+), 19 deletions(-)
>>
>>
>> base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
>> prerequisite-patch-id: eb8a11e2b24bb282970d8b8528834dea7ee392cc