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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Michal Schmidt <mschmidt@redhat.com>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	Lee Jones <lee@kernel.org>, Kees Cook <kees@kernel.org>,
	Andy Shevchenko <andy@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-hardening@vger.kernel.org
Subject: [PATCH 18/28] dpll: zl3073x: Read optional pin properties from firmware
Date: Mon,  7 Apr 2025 19:31:48 +0200	[thread overview]
Message-ID: <20250407173149.1010216-9-ivecera@redhat.com> (raw)
In-Reply-To: <20250407172836.1009461-1-ivecera@redhat.com>

The firmware (DT, ACPI...) can specify properties for particular
pins. Input pins are stored in 'input-pins' sub-node and output
pins in 'output-pins'. Each pin is represented by separate node
in 'input-pins' or 'output-pins'.

The properties that are supported:
* reg - integer that specifies pin index
* label - string that is used by driver as board label
* type - string that indicates pin type

Reviewed-by: Michal Schmidt <mschmidt@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
 drivers/dpll/dpll_zl3073x.c | 102 ++++++++++++++++++++++++++++++++++--
 1 file changed, 98 insertions(+), 4 deletions(-)

diff --git a/drivers/dpll/dpll_zl3073x.c b/drivers/dpll/dpll_zl3073x.c
index 3ff53a333a6e9..cf2cdd6dec263 100644
--- a/drivers/dpll/dpll_zl3073x.c
+++ b/drivers/dpll/dpll_zl3073x.c
@@ -73,10 +73,12 @@ ZL3073X_REG8_IDX_DEF(dpll_ref_prio,		0x652,
  * struct zl3073x_dpll_pin_info - DPLL pin info
  * @props: DPLL core pin properties
  * @package_label: pin package label
+ * @fwnode: pin firmware node
  */
 struct zl3073x_dpll_pin_info {
 	struct dpll_pin_properties	props;
 	char				package_label[8];
+	struct fwnode_handle		*fwnode;
 };
 
 /**
@@ -482,6 +484,62 @@ static const struct dpll_device_ops zl3073x_dpll_device_ops = {
 	.mode_get = zl3073x_dpll_mode_get,
 };
 
+/**
+ * zl3073x_dpll_pin_fwnode_get - get fwnode for given pin
+ * pin: pointer to pin structure
+ *
+ * The caller is responsible for calling fwnode_handle_put() on the returned
+ * fwnode pointer.
+ *
+ * Returns the firmware node for the given pin if it is present or
+ * NULL if it is missing.
+ */
+static struct fwnode_handle *
+zl3073x_dpll_pin_fwnode_get(struct zl3073x_dpll_pin *pin)
+{
+	struct zl3073x_dpll *zldpll = pin_to_dpll(pin);
+	struct fwnode_handle *pins_node, *pin_node;
+	const char *node_name;
+	u8 idx;
+
+	if (zl3073x_dpll_is_input_pin(pin))
+		node_name = "input-pins";
+	else
+		node_name = "output-pins";
+
+	/* Get node containing input or output pins */
+	pins_node = device_get_named_child_node(zldpll->mfd->dev, node_name);
+	if (!pins_node) {
+		dev_dbg(zldpll->mfd->dev, "'%s' sub-node is missing\n",
+			node_name);
+		return NULL;
+	}
+
+	/* Get pin HW index */
+	idx = zl3073x_dpll_pin_index_get(pin);
+
+	/* Enumerate pin nodes and find the requested one */
+	fwnode_for_each_child_node(pins_node, pin_node) {
+		u32 reg;
+
+		if (fwnode_property_read_u32(pin_node, "reg", &reg))
+			continue;
+
+		if (idx == reg)
+			break;
+	}
+
+	/* Release pin parent node */
+	fwnode_handle_put(pins_node);
+
+	dev_dbg(zldpll->mfd->dev, "Firmware node for %s%u%c %sfound\n",
+		zl3073x_dpll_is_input_pin(pin) ? "REF" : "OUT", idx / 2,
+		zl3073x_dpll_is_p_pin(pin) ? 'P' : 'N',
+		pin_node ? "" : "NOT ");
+
+	return pin_node;
+}
+
 /**
  * zl3073x_dpll_pin_info_package_label_set - generate package label for the pin
  * @pin: pointer to pin
@@ -548,8 +606,10 @@ zl3073x_dpll_pin_info_package_label_set(struct zl3073x_dpll_pin *pin,
  * zl3073x_dpll_pin_info_get - get pin info
  * @pin: pin whose info is returned
  *
- * The function allocates pin info structure, generates package label
- * string according pin type and its order number.
+ * The function looks for firmware node for the given pin if it is provided
+ * by the system firmware (DT or ACPI), allocates pin info structure,
+ * generates package label string according pin type and its order number
+ * and optionally fetches board label from the firmware node if it exists.
  *
  * Returns pointer to allocated pin info structure that has to be freed
  * by @zl3073x_dpll_pin_info_put by the caller and in case of error
@@ -558,14 +618,16 @@ zl3073x_dpll_pin_info_package_label_set(struct zl3073x_dpll_pin *pin,
 static struct zl3073x_dpll_pin_info *
 zl3073x_dpll_pin_info_get(struct zl3073x_dpll_pin *pin)
 {
+	struct zl3073x_dev *zldev = pin_to_dev(pin);
 	struct zl3073x_dpll_pin_info *pin_info;
+	const char *pin_type;
 
 	/* Allocate pin info structure */
 	pin_info = kzalloc(sizeof(*pin_info), GFP_KERNEL);
 	if (!pin_info)
 		return ERR_PTR(-ENOMEM);
 
-	/* Set pin type */
+	/* Set default pin type */
 	if (zl3073x_dpll_is_input_pin(pin))
 		pin_info->props.type = DPLL_PIN_TYPE_EXT;
 	else
@@ -577,6 +639,34 @@ zl3073x_dpll_pin_info_get(struct zl3073x_dpll_pin *pin)
 	/* Generate package label for the given pin */
 	zl3073x_dpll_pin_info_package_label_set(pin, pin_info);
 
+	/* Get firmware node for the given pin */
+	pin_info->fwnode = zl3073x_dpll_pin_fwnode_get(pin);
+	if (!pin_info->fwnode)
+		/* Return if it does not exist */
+		return pin_info;
+
+	/* Look for label property and store the value as board label */
+	fwnode_property_read_string(pin_info->fwnode, "label",
+				    &pin_info->props.board_label);
+
+	/* Look for pin type property and translate its value to DPLL
+	 * pin type enum if it is present.
+	 */
+	if (!fwnode_property_read_string(pin_info->fwnode, "type", &pin_type)) {
+		if (!strcmp(pin_type, "ext"))
+			pin_info->props.type = DPLL_PIN_TYPE_EXT;
+		else if (!strcmp(pin_type, "gnss"))
+			pin_info->props.type = DPLL_PIN_TYPE_GNSS;
+		else if (!strcmp(pin_type, "int"))
+			pin_info->props.type = DPLL_PIN_TYPE_INT_OSCILLATOR;
+		else if (!strcmp(pin_type, "synce"))
+			pin_info->props.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT;
+		else
+			dev_warn(zldev->dev,
+				 "Unknown or unsupported pin type '%s'\n",
+				 pin_type);
+	}
+
 	return pin_info;
 }
 
@@ -584,11 +674,15 @@ zl3073x_dpll_pin_info_get(struct zl3073x_dpll_pin *pin)
  * zl3073x_dpll_pin_info_put - free pin info
  * @pin_info: pin info to free
  *
- * The function deallocates given pin info structure.
+ * The function deallocates given pin info structure and firmware node handle.
  */
 static void
 zl3073x_dpll_pin_info_put(struct zl3073x_dpll_pin_info *pin_info)
 {
+	/* Put firmware handle if it is present */
+	if (pin_info->fwnode)
+		fwnode_handle_put(pin_info->fwnode);
+
 	/* Free the pin info structure itself */
 	kfree(pin_info);
 }
-- 
2.48.1


  parent reply	other threads:[~2025-04-07 17:32 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-07 17:28 [PATCH 00/28] Add Microchip ZL3073x support Ivan Vecera
2025-04-07 17:28 ` [PATCH 01/28] mfd: " Ivan Vecera
2025-04-07 17:53   ` Krzysztof Kozlowski
2025-04-09  6:31     ` Ivan Vecera
2025-04-07 18:05   ` Andy Shevchenko
2025-04-09  6:40     ` Ivan Vecera
2025-04-14  6:36       ` Andy Shevchenko
2025-04-14 11:39         ` Ivan Vecera
2025-04-14 11:52           ` Ivan Vecera
2025-04-14 13:55             ` Andy Shevchenko
2025-04-14 14:08               ` Ivan Vecera
2025-04-14 14:07             ` Ivan Vecera
2025-04-14 14:10               ` Andy Shevchenko
2025-04-14 14:13                 ` Andy Shevchenko
2025-04-14 14:16                   ` Andy Shevchenko
2025-04-14 14:53                     ` Ivan Vecera
2025-04-14 17:09                       ` Andy Shevchenko
2025-04-14 17:42                         ` Ivan Vecera
2025-04-14 13:58           ` Andy Shevchenko
2025-04-07 17:28 ` [PATCH 02/28] mfd: zl3073x: Register itself as devlink device Ivan Vecera
2025-04-07 20:57   ` Andrew Lunn
2025-04-09  6:41     ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 03/28] mfd: zl3073x: Add register access helpers Ivan Vecera
2025-04-07 21:03   ` Andrew Lunn
2025-04-09  6:42     ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 04/28] mfd: zl3073x: Add macros for device registers access Ivan Vecera
2025-04-07 17:28 ` [PATCH 05/28] mfd: zl3073x: Add components versions register defs Ivan Vecera
2025-04-07 21:09   ` Andrew Lunn
2025-04-09  6:44     ` Ivan Vecera
2025-04-10  7:11       ` Krzysztof Kozlowski
2025-04-10 10:23         ` Ivan Vecera
2025-04-10 10:42           ` Krzysztof Kozlowski
2025-04-10 12:01             ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 06/28] mfd: zl3073x: Implement devlink device info Ivan Vecera
2025-04-07 17:28 ` [PATCH 07/28] mfd: zl3073x: Add macro to wait for register value bits to be cleared Ivan Vecera
2025-04-07 17:28 ` [PATCH 08/28] mfd: zl3073x: Add functions to work with register mailboxes Ivan Vecera
2025-04-07 17:28 ` [PATCH 09/28] mfd: zl3073x: Add clock_id field Ivan Vecera
2025-04-07 17:31 ` [PATCH 10/28] lib: Allow modules to use strnchrnul Ivan Vecera
2025-04-07 17:50   ` Kees Cook
2025-04-07 17:31 ` [PATCH 11/28] mfd: zl3073x: Load mfg file into HW if it is present Ivan Vecera
2025-04-07 17:31 ` [PATCH 12/28] mfd: zl3073x: Fetch invariants during probe Ivan Vecera
2025-04-07 17:31 ` [PATCH 13/28] dpll: Add Microchip ZL3073x DPLL driver Ivan Vecera
2025-04-07 17:31 ` [PATCH 14/28] mfd: zl3073x: Register DPLL sub-device during init Ivan Vecera
2025-04-07 17:31 ` [PATCH 15/28] dt-bindings: dpll: Add device tree bindings for DPLL device and pin Ivan Vecera
2025-04-07 18:01   ` Krzysztof Kozlowski
2025-04-07 18:10     ` Krzysztof Kozlowski
2025-04-08  5:19     ` Michal Schmidt
2025-04-09  7:09     ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 16/28] dt-bindings: dpll: Add support for Microchip Azurite chip family Ivan Vecera
2025-04-07 18:04   ` Krzysztof Kozlowski
2025-04-09  7:19     ` Ivan Vecera
2025-04-10  7:01       ` Krzysztof Kozlowski
2025-04-10 10:28         ` Ivan Vecera
2025-04-10 12:19           ` Krzysztof Kozlowski
2025-04-10 12:38             ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 17/28] dpll: zl3073x: Read DPLL types from firmware Ivan Vecera
2025-04-07 17:31 ` Ivan Vecera [this message]
2025-04-07 18:06   ` [PATCH 18/28] dpll: zl3073x: Read optional pin properties " Krzysztof Kozlowski
2025-04-09  7:22     ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 19/28] dpll: zl3073x: Implement input pin selection in manual mode Ivan Vecera
2025-04-07 17:32 ` [PATCH 20/28] dpll: zl3073x: Add support to get/set priority on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 21/28] dpll: zl3073x: Implement input pin state setting in automatic mode Ivan Vecera
2025-04-07 17:32 ` [PATCH 22/28] dpll: zl3073x: Add support to get/set frequency on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 23/28] dpll: zl3073x: Add support to get/set frequency on output pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 24/28] dpll: zl3073x: Read pin supported frequencies from firmware Ivan Vecera
2025-04-07 17:32 ` [PATCH 25/28] dpll: zl3073x: Add support to get phase offset on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 26/28] dpll: zl3073x: Add support to get/set phase adjust on pins Ivan Vecera
2025-04-07 17:33 ` [PATCH 27/28] dpll: zl3073x: Add support to get/set esync " Ivan Vecera
2025-04-07 17:33 ` [PATCH 28/28] dpll: zl3073x: Add support to get fractional frequency offset on input pins Ivan Vecera
2025-04-07 18:06 ` [PATCH 00/28] Add Microchip ZL3073x support Andy Shevchenko

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