[PATCH 08/13] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl

Primoz Fiser
2025-04-10T09:03:06Z

Until now, all usdhc2 (SD-card) pinctrl labels pointed to one pinctrl
group "usdhc2grp" which was overwritten twice by the 100 and 200 MHz
modes. Fix this by using unique pinctrl names.

While at it, apply i.MX93 chip errata ERR052021 workaround and adjust
pinctrl drive-strengths to improve signal integrity. Drive-strength
values come from the downstream PHYTEC kernel and were devised and
verified by the hardware department measurements.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
.../dts/freescale/imx93-phyboard-segin.dts | 47 ++++++++++---------
1 file changed, 25 insertions(+), 22 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 3d5cd0561362..525f52789f8b 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -75,39 +75,42 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>;
};

+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_default: usdhc2grp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};

- pinctrl_usdhc2_100mhz: usdhc2grp {
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};

- pinctrl_usdhc2_200mhz: usdhc2grp {
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
};
--
2.34.1