Re: [PATCH v4 5/5] clk: sophgo: Add clock controller support for SG2044 SoC

Krzysztof Kozlowski
2025-04-14T06:42:14Z

On 14/04/2025 00:44, Inochi Amaoto wrote:
> +
> +static int sg2044_clk_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct sg2044_clk_ctrl *ctrl;
> + const struct sg2044_clk_desc_data *desc;
> + void __iomem *reg;
> + u32 num_clks;
> +
> + reg = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(reg))
> + return PTR_ERR(reg);
> +
> + desc = device_get_match_data(dev);
> + if (!desc)
> + return dev_err_probe(dev, -EINVAL, "no match data for platform\n");
> +
> + num_clks = desc->num_div + desc->num_gate + desc->num_mux;
> +
> + ctrl = devm_kzalloc(dev, struct_size(ctrl, data.hws, num_clks), GFP_KERNEL);
> + if (!ctrl)
> + return -ENOMEM;
> +
> + ctrl->data.num = num_clks;
> +
> + return sg2044_clk_init_ctrl(dev, reg, ctrl, desc);
> +}
> +
> +static struct sg2044_clk_desc_data sg2044_clk_desc_data = {

This must be const.

> + .div = sg2044_div_commons,
> + .mux = sg2044_mux_commons,
> + .gate = sg2044_gate_commons,
> + .num_div = ARRAY_SIZE(sg2044_div_commons),
> + .num_mux = ARRAY_SIZE(sg2044_mux_commons),
> + .num_gate = ARRAY_SIZE(sg2044_gate_commons),
> +};
> +
Best regards,
Krzysztof