From: Peter Chen <peter.chen@cixtech.com>
To: soc@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org,
arnd@arndb.de, jassisinghbrar@gmail.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
maz@kernel.org, kajetan.puchalski@arm.com,
Guomin Chen <Guomin.Chen@cixtech.com>,
Peter Chen <peter.chen@cixtech.com>,
Lihua Liu <Lihua.Liu@cixtech.com>
Subject: [PATCH v6 05/10] dt-bindings: mailbox: add cix,sky1-mbox
Date: Tue, 15 Apr 2025 15:27:19 +0800 [thread overview]
Message-ID: <20250415072724.3565533-6-peter.chen@cixtech.com> (raw)
In-Reply-To: <20250415072724.3565533-1-peter.chen@cixtech.com>
From: Guomin Chen <Guomin.Chen@cixtech.com>
Add a dt-binding for the Cixtech Mailbox Controller.
Reviewed-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com>
Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com>
---
Changes for v3:
- Replace the direction attribute of the mailbox with the strings "rx" and "tx"
.../bindings/mailbox/cix,sky1-mbox.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml b/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
new file mode 100644
index 000000000000..216186f7cc4d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cixtech mailbox controller
+
+maintainers:
+ - Guomin Chen <Guomin.Chen@cixtech.com>
+
+description:
+ The Cixtech mailbox controller, used in the Cixtech Sky1 SoC,
+ is used for message transmission between multiple processors
+ within the SoC, such as the AP, PM, audio DSP, SensorHub MCU,
+ and others
+
+ Each Cixtech mailbox controller is unidirectional, so they are
+ typically used in pairs-one for receiving and one for transmitting.
+
+ Each Cixtech mailbox supports 11 channels with different transmission modes
+ channel 0-7 - Fast channel with 32bit transmit register and IRQ support
+ channel 8 - Doorbell mode,using the mailbox as an interrupt-generating
+ mechanism.
+ channel 9 - Fifo based channel with 32*32bit depth fifo and IRQ support
+ channel 10 - Reg based channel with 32*32bit transmit register and
+ Doorbell+transmit acknowledgment IRQ support
+
+properties:
+ compatible:
+ const: cix,sky1-mbox
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#mbox-cells":
+ const: 1
+
+ cix,mbox-dir:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: Direction of the mailbox relative to the AP
+ enum: [tx, rx]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#mbox-cells"
+ - cix,mbox-dir
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ mbox_ap2pm: mailbox@30000000 {
+ compatible = "cix,sky1-mbox";
+ reg = <0 0x30000000 0 0x10000>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <1>;
+ cix,mbox-dir = "tx";
+ };
+ };
--
2.25.1
next prev parent reply other threads:[~2025-04-15 7:27 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-15 7:27 [PATCH v6 00/10] arm64: Introduce CIX P1 (SKY1) SoC Peter Chen
2025-04-15 7:27 ` [PATCH v6 01/10] dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd Peter Chen
2025-04-15 7:27 ` [PATCH v6 02/10] dt-bindings: arm: add CIX P1 (SKY1) SoC Peter Chen
2025-04-15 7:27 ` [PATCH v6 03/10] arm64: Kconfig: add ARCH_CIX for cix silicons Peter Chen
2025-04-15 7:27 ` [PATCH v6 04/10] arm64: defconfig: Enable CIX SoC Peter Chen
2025-04-15 7:27 ` Peter Chen [this message]
2025-04-16 6:34 ` [PATCH v6 05/10] dt-bindings: mailbox: add cix,sky1-mbox Krzysztof Kozlowski
2025-04-16 8:48 ` Peter Chen
2025-04-17 6:16 ` Krzysztof Kozlowski
2025-04-15 7:27 ` [PATCH v6 06/10] mailbox: add CIX mailbox driver Peter Chen
2025-04-15 18:39 ` Sudeep Holla
2025-04-16 1:04 ` Peter Chen
2025-04-22 1:33 ` Peter Chen
2025-04-15 7:27 ` [PATCH v6 07/10] arm64: defconfig: enable CIX mailbox Peter Chen
2025-04-16 6:35 ` Krzysztof Kozlowski
2025-04-16 8:56 ` Peter Chen
2025-04-15 7:27 ` [PATCH v6 08/10] dt-bindings: clock: cix: Add CIX sky1 scmi clock id Peter Chen
2025-04-16 6:35 ` Krzysztof Kozlowski
2025-04-16 6:38 ` Krzysztof Kozlowski
2025-04-16 8:26 ` Peter Chen
2025-04-16 8:29 ` Krzysztof Kozlowski
2025-04-16 8:55 ` Peter Chen
2025-04-15 7:27 ` [PATCH v6 09/10] arm64: dts: cix: add initial CIX P1(SKY1) dts support Peter Chen
2025-04-15 13:48 ` Kajetan Puchalski
2025-04-16 1:13 ` Peter Chen
2025-04-17 6:18 ` Krzysztof Kozlowski
2025-04-17 6:37 ` Peter Chen
2025-04-17 6:58 ` Krzysztof Kozlowski
2025-04-17 8:24 ` Peter Chen
2025-04-17 6:19 ` Krzysztof Kozlowski
2025-04-17 6:38 ` Peter Chen
2025-04-15 7:27 ` [PATCH v6 10/10] MAINTAINERS: Add CIX SoC maintainer entry Peter Chen
2025-04-24 9:11 ` [PATCH v6 00/10] arm64: Introduce CIX P1 (SKY1) SoC Enric Balletbo i Serra
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