From: Harshitha Ramamurthy <hramamurthy@google.com>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, jeroendb@google.com, hramamurthy@google.com,
andrew+netdev@lunn.ch, willemb@google.com, ziweixiao@google.com,
pkaligineedi@google.com, yyd@google.com, joshwash@google.com,
shailend@google.com, linux@treblig.org, thostet@google.com,
jfraker@google.com, horms@kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH net-next 3/6] gve: Add initial gve_clock
Date: Fri, 18 Apr 2025 22:12:51 +0000 [thread overview]
Message-ID: <20250418221254.112433-4-hramamurthy@google.com> (raw)
In-Reply-To: <20250418221254.112433-1-hramamurthy@google.com>
From: Kevin Yang <yyd@google.com>
This initial version of the gve clock only performs one major function,
managing querying the nic clock and storing the results.
The timestamp delivered in descriptors has a wraparound time of ~4
seconds so 250ms is chosen as the sync cadence to provide a balance
between performance, and drift potential when we do start associating
host time and nic time.
A dedicated ordered workqueue has been setup to ensure a consistent
cadence for querying the nic clock.
Co-developed-by: John Fraker <jfraker@google.com>
Signed-off-by: John Fraker <jfraker@google.com>
Co-developed-by: Ziwei Xiao <ziweixiao@google.com>
Signed-off-by: Ziwei Xiao <ziweixiao@google.com>
Co-developed-by: Tim Hostetler <thostet@google.com>
Signed-off-by: Tim Hostetler <thostet@google.com>
Reviewed-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: Kevin Yang <yyd@google.com>
Signed-off-by: Harshitha Ramamurthy <hramamurthy@google.com>
---
drivers/net/ethernet/google/gve/Makefile | 2 +-
drivers/net/ethernet/google/gve/gve.h | 8 ++
drivers/net/ethernet/google/gve/gve_clock.c | 103 ++++++++++++++++++++
3 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/google/gve/gve_clock.c
diff --git a/drivers/net/ethernet/google/gve/Makefile b/drivers/net/ethernet/google/gve/Makefile
index 4520f1c07a63..c8fae2c03f2b 100644
--- a/drivers/net/ethernet/google/gve/Makefile
+++ b/drivers/net/ethernet/google/gve/Makefile
@@ -2,4 +2,4 @@
obj-$(CONFIG_GVE) += gve.o
gve-objs := gve_main.o gve_tx.o gve_tx_dqo.o gve_rx.o gve_rx_dqo.o gve_ethtool.o gve_adminq.o gve_utils.o gve_flow_rule.o \
- gve_buffer_mgmt_dqo.o
+ gve_buffer_mgmt_dqo.o gve_clock.o
diff --git a/drivers/net/ethernet/google/gve/gve.h b/drivers/net/ethernet/google/gve/gve.h
index cf6947731a9b..5a141a8735d6 100644
--- a/drivers/net/ethernet/google/gve/gve.h
+++ b/drivers/net/ethernet/google/gve/gve.h
@@ -873,7 +873,12 @@ struct gve_priv {
struct gve_rss_config rss_config;
/* True if the device supports reading the nic clock */
+ struct workqueue_struct *gve_ts_wq;
bool nic_timestamp_supported;
+ struct delayed_work nic_ts_sync_task;
+ struct gve_nic_ts_report *nic_ts_report;
+ dma_addr_t nic_ts_report_bus;
+ u64 last_sync_nic_counter; /* Clock counter from last NIC TS report */
};
enum gve_service_task_flags_bit {
@@ -1255,6 +1260,9 @@ int gve_flow_rules_reset(struct gve_priv *priv);
int gve_init_rss_config(struct gve_priv *priv, u16 num_queues);
/* report stats handling */
void gve_handle_report_stats(struct gve_priv *priv);
+/* Timestamping */
+int gve_init_clock(struct gve_priv *priv);
+void gve_teardown_clock(struct gve_priv *priv);
/* exported by ethtool.c */
extern const struct ethtool_ops gve_ethtool_ops;
/* needed by ethtool */
diff --git a/drivers/net/ethernet/google/gve/gve_clock.c b/drivers/net/ethernet/google/gve/gve_clock.c
new file mode 100644
index 000000000000..464ce9a6f4b6
--- /dev/null
+++ b/drivers/net/ethernet/google/gve/gve_clock.c
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Google virtual Ethernet (gve) driver
+ *
+ * Copyright (C) 2015-2025 Google LLC
+ */
+
+#include "gve.h"
+#include "gve_adminq.h"
+
+/* Interval to schedule a nic timestamp calibration, 250ms. */
+#define GVE_NIC_TS_SYNC_INTERVAL_MS 250
+
+/* Read the nic timestamp from hardware via the admin queue. */
+static int gve_clock_nic_ts_read(struct gve_priv *priv)
+{
+ u64 nic_raw;
+ int err;
+
+ err = gve_adminq_report_nic_ts(priv, priv->nic_ts_report_bus);
+ if (err)
+ return err;
+
+ nic_raw = be64_to_cpu(priv->nic_ts_report->nic_timestamp);
+ WRITE_ONCE(priv->last_sync_nic_counter, nic_raw);
+
+ return 0;
+}
+
+static void gve_nic_ts_sync_task(struct work_struct *work)
+{
+ struct gve_priv *priv = container_of(work, struct gve_priv,
+ nic_ts_sync_task.work);
+ int err;
+
+ if (gve_get_reset_in_progress(priv) || !gve_get_admin_queue_ok(priv))
+ goto out;
+
+ err = gve_clock_nic_ts_read(priv);
+ if (err && net_ratelimit())
+ dev_err(&priv->pdev->dev,
+ "%s read err %d\n", __func__, err);
+
+out:
+ queue_delayed_work(priv->gve_wq, &priv->nic_ts_sync_task,
+ msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS));
+}
+
+int gve_init_clock(struct gve_priv *priv)
+{
+ int err;
+
+ if (!priv->nic_timestamp_supported)
+ return -EPERM;
+
+ priv->nic_ts_report =
+ dma_alloc_coherent(&priv->pdev->dev,
+ sizeof(struct gve_nic_ts_report),
+ &priv->nic_ts_report_bus,
+ GFP_KERNEL);
+ if (!priv->nic_ts_report) {
+ dev_err(&priv->pdev->dev, "%s dma alloc error\n", __func__);
+ return -ENOMEM;
+ }
+
+ err = gve_clock_nic_ts_read(priv);
+ if (err) {
+ dev_err(&priv->pdev->dev, "%s read error %d\n", __func__, err);
+ goto free_nic_ts_report;
+ }
+
+ priv->gve_ts_wq = alloc_ordered_workqueue("gve-ts", 0);
+ if (!priv->gve_ts_wq) {
+ dev_err(&priv->pdev->dev, "%s Could not allocate workqueue\n",
+ __func__);
+ err = -ENOMEM;
+ goto free_nic_ts_report;
+ }
+ INIT_DELAYED_WORK(&priv->nic_ts_sync_task, gve_nic_ts_sync_task);
+ queue_delayed_work(priv->gve_ts_wq, &priv->nic_ts_sync_task,
+ msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS));
+
+ return 0;
+
+free_nic_ts_report:
+ dma_free_coherent(&priv->pdev->dev,
+ sizeof(struct gve_nic_ts_report),
+ priv->nic_ts_report, priv->nic_ts_report_bus);
+ priv->nic_ts_report = NULL;
+
+ return err;
+}
+
+void gve_teardown_clock(struct gve_priv *priv)
+{
+ if (priv->nic_ts_report) {
+ cancel_delayed_work_sync(&priv->nic_ts_sync_task);
+ destroy_workqueue(priv->gve_ts_wq);
+ dma_free_coherent(&priv->pdev->dev,
+ sizeof(struct gve_nic_ts_report),
+ priv->nic_ts_report, priv->nic_ts_report_bus);
+ priv->nic_ts_report = NULL;
+ }
+}
--
2.49.0.805.g082f7c87e0-goog
next prev parent reply other threads:[~2025-04-18 22:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-18 22:12 [PATCH net-next 0/6] gve: Add Rx HW timestamping support Harshitha Ramamurthy
2025-04-18 22:12 ` [PATCH net-next 1/6] gve: Add device option for nic clock synchronization Harshitha Ramamurthy
2025-04-23 1:42 ` Joe Damato
2025-04-18 22:12 ` [PATCH net-next 2/6] gve: Add adminq command to report nic timestamp Harshitha Ramamurthy
2025-04-23 1:44 ` Joe Damato
2025-04-18 22:12 ` Harshitha Ramamurthy [this message]
2025-04-23 1:49 ` [PATCH net-next 3/6] gve: Add initial gve_clock Joe Damato
2025-04-18 22:12 ` [PATCH net-next 4/6] gve: Add rx hardware timestamp expansion Harshitha Ramamurthy
2025-04-23 1:21 ` Joe Damato
2025-04-24 18:40 ` Ziwei Xiao
2025-04-18 22:12 ` [PATCH net-next 5/6] gve: Add support for SIOC[GS]HWTSTAMP IOCTLs Harshitha Ramamurthy
2025-04-23 1:52 ` Joe Damato
2025-04-18 22:12 ` [PATCH net-next 6/6] gve: Advertise support for rx hardware timestamping Harshitha Ramamurthy
2025-04-23 1:53 ` Joe Damato
2025-04-23 10:13 ` [PATCH net-next 0/6] gve: Add Rx HW timestamping support Vadim Fedorenko
2025-04-23 20:46 ` Ziwei Xiao
2025-04-23 21:06 ` Vadim Fedorenko
2025-04-23 22:56 ` Jakub Kicinski
2025-04-24 18:39 ` Ziwei Xiao
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