Re: [PATCH] memcg: multi-memcg percpu charge cache

Shakeel Butt
2025-04-29T18:43:36Z

On Tue, Apr 29, 2025 at 02:13:16PM +0200, Michal Hocko wrote:
>
> > Some of the design choices are:
> >
> > 1. Fit all caches memcgs in a single cacheline.
>
> Could you be more specific about the reasoning? I suspect it is for the
> network receive path you are mentioning above, right?
>

Here I meant why I chose NR_MEMCG_STOCK to be 7. Basically the first
cacheline of per-cpu stock has all the cached memcg, so checking if a
given memcg is cached or not should be comparable cheap as single cached
memcg. You suggested comment already mentioned this.

However please note that we may find in future that 2 cachelines worth of
cached memcgs are better for wider audience/workloads but for simplicity
let's start with single cacheline worth of cached memcgs.

[...]
>
> Just a minor suggestion below. Other than that looks good to me (with
> follow up fixes) in this thread.
> Acked-by: Michal Hocko <mhocko@suse.com>
> Thanks!
>

Thanks, I will send a diff for Andrew to squash it into original patch.