[PATCH 0/4] Initial support for CTCISZ Ninenine Pi

[PATCH 0/4] Initial support for CTCISZ Ninenine Pi

[Yao Zi]

This series adds support for CTCISZ Ninenine Pi, which ships an Loongson
2K0300 SoC and various peripherals. The vendor prefix and the board are
documented and basic SoC/board devicetrees are added.

I've successfully booted into console with vendor U-Boot, a bootlog
could be obtained here[1]. DTB and initramfs must be built into the
kernel as the vendor bootloader cannot pass them and upstream U-Boot
support for LoongArch is still WIP.

Thanks for your time and review.

[1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e

Yao Zi (4):
  dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
  dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
  LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
  LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

 .../bindings/loongarch/loongson.yaml          |   5 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/loongarch/boot/dts/Makefile              |   1 +
 arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
 .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
 5 files changed, 246 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
 create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts

-- 
2.49.0

[PATCH 1/4] dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.

[Yao Zi]

CTCISZ Technology Co., LTD. is a company specializing in designing of
embedded systems. Document the vendor prefix.

Link: http://www.ctcisz.com/
Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 86f6a19b28ae..02f35e583948 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -344,6 +344,8 @@ patternProperties:
     description: Guangzhou China Star Optoelectronics Technology Co., Ltd
   "^csq,.*":
     description: Shenzen Chuangsiqi Technology Co.,Ltd.
+  "^ctcisz,.*":
+    description: CTCISZ Technology Co.,Ltd.
   "^ctera,.*":
     description: CTERA Networks Intl.
   "^ctu,.*":
-- 
2.49.0

[PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

[Yao Zi]

Ninenine Pi is an Loongson 2K0300-based development board produced by
CTCISZ. Features include,

- 512MiB DDR4 RAM
- On-board eMMC storage
- Optional SD Card support
- 2 USB 2.0 Ports (OTG and HOST)
- 1 GbE Ethernet port
- Optional WiFi/BT support
- Audio output through 3.5mm phone connector
- Optional display output through RAW RGB interface

Add compatible string for the board.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/loongarch/loongson.yaml b/Documentation/devicetree/bindings/loongarch/loongson.yaml
index e1a4a97b7576..aac4af9ee97a 100644
--- a/Documentation/devicetree/bindings/loongarch/loongson.yaml
+++ b/Documentation/devicetree/bindings/loongarch/loongson.yaml
@@ -14,6 +14,11 @@ properties:
     const: '/'
   compatible:
     oneOf:
+      - description: CTCISZ Ninenine Pi
+        items:
+          - const: ctcisz,ninenine-pi
+          - const: loongson,ls2k0300
+
       - description: Loongson-2K0500 processor based boards
         items:
           - const: loongson,ls2k0500-ref
-- 
2.49.0

[PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

[Yao Zi]

Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
core and targets embedded market. Only CPU core, legacy interrupt
controllers and UARTs are defined for now.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
 1 file changed, 197 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi

diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
new file mode 100644
index 000000000000..6991a368ff94
--- /dev/null
+++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Loongson Technology Corporation Limited
+ * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "loongson,ls2k0300";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			reg = <0>;
+			device_type = "cpu";
+			clocks = <&cpu_clk>;
+		};
+
+	};
+
+	cpuintc: interrupt-controller {
+		compatible = "loongson,cpu-interrupt-controller";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	cpu_clk: clock-1000m {
+		compatible = "fixed-clock";
+		clock-frequency = <1000000000>;
+		#clock-cells = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
+			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
+			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
+
+		liointc0: interrupt-controller@16001400{
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001400 0x0 0x40>,
+			      <0x0 0x16001040 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+			interrupt-names = "int0";
+
+			loongson,parent_int_map = <0xffffffff>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0x00000000>, /* int2 */
+						  <0x00000000>; /* int3 */
+		};
+
+		liointc1: interrupt-controller@16001440 {
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001440 0x0 0x40>,
+			      <0x0 0x16001048 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <4>;
+			interrupt-names = "int2";
+
+			loongson,parent_int_map = <0x00000000>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0xffffffff>, /* int2 */
+						  <0x00000000>; /* int3 */
+		};
+
+		uart0: serial@16100000 {
+			compatible = "ns16550a";
+			reg = <0 0x16100000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart1: serial@16100400 {
+			compatible = "ns16550a";
+			reg = <0 0x16100400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart2: serial@16100800 {
+			compatible = "ns16550a";
+			reg = <0 0x16100800 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart3: serial@16100c00 {
+			compatible = "ns16550a";
+			reg = <0 0x16100c00 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart4: serial@16101000 {
+			compatible = "ns16550a";
+			reg = <0 0x16101000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart5: serial@16101400 {
+			compatible = "ns16550a";
+			reg = <0 0x16101400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart6: serial@16101800 {
+			compatible = "ns16550a";
+			reg = <0 0x16101800 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart7: serial@16101c00 {
+			compatible = "ns16550a";
+			reg = <0 0x16101c00 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart8: serial@16102000 {
+			compatible = "ns16550a";
+			reg = <0 0x16102000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart9: serial@16102400 {
+			compatible = "ns16550a";
+			reg = <0 0x16102400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		isa@16400000 {
+			compatible = "isa";
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <1 0x0 0x0 0x16400000 0x4000>;
+		};
+	};
+};
-- 
2.49.0

[PATCH 4/4] LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

[Yao Zi]

Enable UART0 as it's the boot UART used by firmware.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/loongarch/boot/dts/Makefile              |  1 +
 .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   | 41 +++++++++++++++++++
 2 files changed, 42 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts

diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile
index 15d5e14fe418..e55df9f385af 100644
--- a/arch/loongarch/boot/dts/Makefile
+++ b/arch/loongarch/boot/dts/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
+dtb-y += ls2k0300-ctcisz-nineninepi.dtb
diff --git a/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts b/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
new file mode 100644
index 000000000000..a67a8ce4211e
--- /dev/null
+++ b/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0300.dtsi"
+
+/ {
+	compatible = "ctcisz,ninenine-pi", "loongson,ls2k0300";
+	model = "CTCISZ Ninenine Pi";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@200000 {
+		device_type = "memory";
+		reg = <0 0x00200000 0 0x0ee00000>,
+		      <0 0x90000000 0 0x10000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		linux,cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0 0x02000000>;
+			linux,cma-default;
+		};
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+	status = "okay";
+};
-- 
2.49.0

Re: [PATCH 1/4] dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.

[Krzysztof Kozlowski]

On 01/05/2025 06:42, Yao Zi wrote:
> CTCISZ Technology Co., LTD. is a company specializing in designing of
> embedded systems. Document the vendor prefix.
> 
> Link: http://www.ctcisz.com/
> Signed-off-by: Yao Zi <ziyao@disroot.org>

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

[Krzysztof Kozlowski]

On 01/05/2025 06:42, Yao Zi wrote:
> Ninenine Pi is an Loongson 2K0300-based development board produced by
> CTCISZ. Features include,


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

[Krzysztof Kozlowski]

On 01/05/2025 06:42, Yao Zi wrote:
> Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
> core and targets embedded market. Only CPU core, legacy interrupt
> controllers and UARTs are defined for now.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
>  arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
>  1 file changed, 197 insertions(+)
>  create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
> 
> diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> new file mode 100644
> index 000000000000..6991a368ff94
> --- /dev/null
> +++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> @@ -0,0 +1,197 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2025 Loongson Technology Corporation Limited
> + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +	compatible = "loongson,ls2k0300";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +		serial2 = &uart2;
> +		serial3 = &uart3;
> +		serial4 = &uart4;
> +		serial5 = &uart5;
> +		serial6 = &uart6;
> +		serial7 = &uart7;
> +		serial8 = &uart8;
> +		serial9 = &uart9;


UARTs depend on connectors, so these are board-level aliases.


> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu@0 {
> +			compatible = "loongson,la264";
> +			reg = <0>;
> +			device_type = "cpu";
> +			clocks = <&cpu_clk>;
> +		};
> +
> +	};
> +
> +	cpuintc: interrupt-controller {
> +		compatible = "loongson,cpu-interrupt-controller";
> +		interrupt-controller;
> +		#interrupt-cells = <1>;
> +	};
> +
> +	cpu_clk: clock-1000m {
> +		compatible = "fixed-clock";
> +		clock-frequency = <1000000000>;
> +		#clock-cells = <0>;
> +	};
> +
> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
> +			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
> +			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
> +
> +		liointc0: interrupt-controller@16001400{

Missing space, {

> +			compatible = "loongson,liointc-2.0";
> +			reg = <0x0 0x16001400 0x0 0x40>,
> +			      <0x0 0x16001040 0x0 0x8>;
> +			reg-names = "main", "isr0";
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +
> +			interrupt-parent = <&cpuintc>;
> +			interrupts = <2>;
> +			interrupt-names = "int0";
> +
> +			loongson,parent_int_map = <0xffffffff>, /* int0 */
> +						  <0x00000000>, /* int1 */
> +						  <0x00000000>, /* int2 */
> +						  <0x00000000>; /* int3 */
> +		};
> +



Best regards,
Krzysztof

Re: [PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

[Yao Zi]

On Thu, May 01, 2025 at 12:55:04PM +0200, Krzysztof Kozlowski wrote:
> On 01/05/2025 06:42, Yao Zi wrote:
> > Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
> > core and targets embedded market. Only CPU core, legacy interrupt
> > controllers and UARTs are defined for now.
> > 
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> >  arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
> >  1 file changed, 197 insertions(+)
> >  create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > 
> > diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > new file mode 100644
> > index 000000000000..6991a368ff94
> > --- /dev/null
> > +++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > @@ -0,0 +1,197 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2025 Loongson Technology Corporation Limited
> > + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +/ {
> > +	compatible = "loongson,ls2k0300";
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	aliases {
> > +		serial0 = &uart0;
> > +		serial1 = &uart1;
> > +		serial2 = &uart2;
> > +		serial3 = &uart3;
> > +		serial4 = &uart4;
> > +		serial5 = &uart5;
> > +		serial6 = &uart6;
> > +		serial7 = &uart7;
> > +		serial8 = &uart8;
> > +		serial9 = &uart9;
> 
> 
> UARTs depend on connectors, so these are board-level aliases.
> 
> 
> > +	};
> > +
> > +	cpus {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		cpu0: cpu@0 {
> > +			compatible = "loongson,la264";
> > +			reg = <0>;
> > +			device_type = "cpu";
> > +			clocks = <&cpu_clk>;
> > +		};
> > +
> > +	};
> > +
> > +	cpuintc: interrupt-controller {
> > +		compatible = "loongson,cpu-interrupt-controller";
> > +		interrupt-controller;
> > +		#interrupt-cells = <1>;
> > +	};
> > +
> > +	cpu_clk: clock-1000m {
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <1000000000>;
> > +		#clock-cells = <0>;
> > +	};
> > +
> > +	soc {
> > +		compatible = "simple-bus";
> > +		#address-cells = <2>;
> > +		#size-cells = <2>;
> > +		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
> > +			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
> > +			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
> > +
> > +		liointc0: interrupt-controller@16001400{
> 
> Missing space, {
> 
> > +			compatible = "loongson,liointc-2.0";
> > +			reg = <0x0 0x16001400 0x0 0x40>,
> > +			      <0x0 0x16001040 0x0 0x8>;
> > +			reg-names = "main", "isr0";
> > +
> > +			interrupt-controller;
> > +			#interrupt-cells = <2>;
> > +
> > +			interrupt-parent = <&cpuintc>;
> > +			interrupts = <2>;
> > +			interrupt-names = "int0";
> > +
> > +			loongson,parent_int_map = <0xffffffff>, /* int0 */
> > +						  <0x00000000>, /* int1 */
> > +						  <0x00000000>, /* int2 */
> > +						  <0x00000000>; /* int3 */
> > +		};
> > +
> 
> 
> 
> Best regards,
> Krzysztof
> 

Thanks for finding the issues, will fix all of them in v2.

Thanks,
Yao Zi

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

[Yanteng Si]

在 5/1/25 12:42 PM, Yao Zi 写道:
> Ninenine Pi is an Loongson 2K0300-based development board produced by
I think "Ninenine Pi" doesn't make sense. I browsed 
<https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that 
the Chinese name of this development board is "久久派". Interestingly, its 
selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same 
pronunciation as the Chinese character "久". It seems that you intended 
to name the development board after its selling price. But shouldn't it 
be "Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a 
better option?


Thanks,
Yanteng


> CTCISZ. Features include,
> 
> - 512MiB DDR4 RAM
> - On-board eMMC storage
> - Optional SD Card support
> - 2 USB 2.0 Ports (OTG and HOST)
> - 1 GbE Ethernet port
> - Optional WiFi/BT support
> - Audio output through 3.5mm phone connector
> - Optional display output through RAW RGB interface
> 
> Add compatible string for the board.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
>   Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/loongarch/loongson.yaml b/Documentation/devicetree/bindings/loongarch/loongson.yaml
> index e1a4a97b7576..aac4af9ee97a 100644
> --- a/Documentation/devicetree/bindings/loongarch/loongson.yaml
> +++ b/Documentation/devicetree/bindings/loongarch/loongson.yaml
> @@ -14,6 +14,11 @@ properties:
>       const: '/'
>     compatible:
>       oneOf:
> +      - description: CTCISZ Ninenine Pi
> +        items:
> +          - const: ctcisz,ninenine-pi
> +          - const: loongson,ls2k0300
> +
>         - description: Loongson-2K0500 processor based boards
>           items:
>             - const: loongson,ls2k0500-ref

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

[Yao Zi]

On Tue, May 06, 2025 at 04:58:50PM +0800, Yanteng Si wrote:
> 在 5/1/25 12:42 PM, Yao Zi 写道:
> > Ninenine Pi is an Loongson 2K0300-based development board produced by
> I think "Ninenine Pi" doesn't make sense. I browsed
> <https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that the
> Chinese name of this development board is "久久派". Interestingly, its
> selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same
> pronunciation as the Chinese character "久".

> It seems that you intended to name the development board after its
> selling price.

I've confirmed with the vendor that they call the board "99pi" in
English which is rewritten as "Ninenine Pi" to avoid possibly unexpected
problems with a name starting with digits. This has nothing to do with
the price.

> But shouldn't it be
> "Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a better
> option?

"Ninety-nine Pi" sounds too complicated for a board name and I don't
think "99" in "99pi" is meant to represent a number. Thus I'd like to
stick with "ninenine pi".

> 
> 
> Thanks,
> Yanteng

Best regards,
Yao Zi

> 
> > CTCISZ. Features include,
> > 
> > - 512MiB DDR4 RAM
> > - On-board eMMC storage
> > - Optional SD Card support
> > - 2 USB 2.0 Ports (OTG and HOST)
> > - 1 GbE Ethernet port
> > - Optional WiFi/BT support
> > - Audio output through 3.5mm phone connector
> > - Optional display output through RAW RGB interface
> > 
> > Add compatible string for the board.
> > 
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> >   Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
> >   1 file changed, 5 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/loongarch/loongson.yaml b/Documentation/devicetree/bindings/loongarch/loongson.yaml
> > index e1a4a97b7576..aac4af9ee97a 100644
> > --- a/Documentation/devicetree/bindings/loongarch/loongson.yaml
> > +++ b/Documentation/devicetree/bindings/loongarch/loongson.yaml
> > @@ -14,6 +14,11 @@ properties:
> >       const: '/'
> >     compatible:
> >       oneOf:
> > +      - description: CTCISZ Ninenine Pi
> > +        items:
> > +          - const: ctcisz,ninenine-pi
> > +          - const: loongson,ls2k0300
> > +
> >         - description: Loongson-2K0500 processor based boards
> >           items:
> >             - const: loongson,ls2k0500-ref
> 
> 

Re: [PATCH 0/4] Initial support for CTCISZ Ninenine Pi

[Yanteng Si]

在 5/1/25 12:42 PM, Yao Zi 写道:
> This series adds support for CTCISZ Ninenine Pi, which ships an Loongson
> 2K0300 SoC and various peripherals. The vendor prefix and the board are
> documented and basic SoC/board devicetrees are added.
> 
> I've successfully booted into console with vendor U-Boot, a bootlog
> could be obtained here[1]. DTB and initramfs must be built into the
> kernel as the vendor bootloader cannot pass them and upstream U-Boot
> support for LoongArch is still WIP.
> 
> Thanks for your time and review.
> 
> [1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e
> 
> Yao Zi (4):
>    dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
>    dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
>    LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
>    LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi
> 
>   .../bindings/loongarch/loongson.yaml          |   5 +
>   .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>   arch/loongarch/boot/dts/Makefile              |   1 +
>   arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
>   .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
>   5 files changed, 246 insertions(+)
>   create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
>   create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts

For all the patch sets:

Reviewed-by: Yanteng Si <si.yanteng@linux.dev>


Thanks,
Yanteng
> 

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

[Yanteng Si]

在 5/7/25 3:07 PM, Yao Zi 写道:
> On Tue, May 06, 2025 at 04:58:50PM +0800, Yanteng Si wrote:
>> 在 5/1/25 12:42 PM, Yao Zi 写道:
>>> Ninenine Pi is an Loongson 2K0300-based development board produced by
>> I think "Ninenine Pi" doesn't make sense. I browsed
>> <https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that the
>> Chinese name of this development board is "久久派". Interestingly, its
>> selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same
>> pronunciation as the Chinese character "久".
> 
>> It seems that you intended to name the development board after its
>> selling price.
> 
> I've confirmed with the vendor that they call the board "99pi" in
> English which is rewritten as "Ninenine Pi" to avoid possibly unexpected
> problems with a name starting with digits. This has nothing to do with
> the price.
I searched on the Internet for a long time last night, but
still couldn't find the source of Ninenine Pi. Can you
provide the origin of the manufacturer's naming? Or transfer
our offline discussion to an online platform.

What are the possible unexpected problems that may be
triggered? For example?
> 
>> But shouldn't it be
>> "Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a better
>> option?
> 
> "Ninety-nine Pi" sounds too complicated for a board name and I don't
> think "99" in "99pi" is meant to represent a number. Thus I'd like to
> stick with "ninenine pi".
Since 99 has nothing to do with the price, and you think that
the 9 is not used to represent a number, then I'm curious. In
the name of this development board, what does the 9 represent?
Based on my research, I have already clarified that "99" has
the same Chinese pronunciation as "久久 (long time)", so I
think the naming should carry the implication of "lasting
or a long time".

I have research on other similar development boards,
such as Raspberry Pi, Orange Pi, Mango Pi... The English names
of these development boards all have corresponding meanings.
Why can't we come up with a good name?

Based on the above discussion, I don't accept the name "ninenine Pi" 
which has no implied meaning.

Thanks,
Yanteng
> 
>>
>>
>> Thanks,
>> Yanteng
> 
> Best regards,
> Yao Zi
> 
>>

Re: [PATCH 0/4] Initial support for CTCISZ Ninenine Pi

[Yanteng Si]

在 5/7/25 6:08 PM, Yanteng Si 写道:
> 在 5/1/25 12:42 PM, Yao Zi 写道:
>> This series adds support for CTCISZ Ninenine Pi, which ships an Loongson
>> 2K0300 SoC and various peripherals. The vendor prefix and the board are
>> documented and basic SoC/board devicetrees are added.
>>
>> I've successfully booted into console with vendor U-Boot, a bootlog
>> could be obtained here[1]. DTB and initramfs must be built into the
>> kernel as the vendor bootloader cannot pass them and upstream U-Boot
>> support for LoongArch is still WIP.
>>
>> Thanks for your time and review.
>>
>> [1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e
>>
>> Yao Zi (4):
>>    dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
>>    dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
>>    LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
>>    LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi
>>
>>   .../bindings/loongarch/loongson.yaml          |   5 +
>>   .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>>   arch/loongarch/boot/dts/Makefile              |   1 +
>>   arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
>>   .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
>>   5 files changed, 246 insertions(+)
>>   create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
>>   create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz- 
>> nineninepi.dts
> 
> For all the patch sets:
> 
> Reviewed-by: Yanteng Si <si.yanteng@linux.dev>
I'm sorry. As there is no consensus yet on the name
of the development board, could you please refrain
from picking my R_B until this discussion is completed?
Thank you so much for your understanding and cooperation!

Thanks,
Yanteng
> 
> 
> Thanks,
> Yanteng
>>
> 

Re: [PATCH 0/4] Initial support for CTCISZ Ninenine Pi

[Yao Zi]

On Thu, May 08, 2025 at 10:49:25AM +0800, Yanteng Si wrote:
> 
> 
> 在 5/7/25 6:08 PM, Yanteng Si 写道:
> > 在 5/1/25 12:42 PM, Yao Zi 写道:
> > > This series adds support for CTCISZ Ninenine Pi, which ships an Loongson
> > > 2K0300 SoC and various peripherals. The vendor prefix and the board are
> > > documented and basic SoC/board devicetrees are added.
> > > 
> > > I've successfully booted into console with vendor U-Boot, a bootlog
> > > could be obtained here[1]. DTB and initramfs must be built into the
> > > kernel as the vendor bootloader cannot pass them and upstream U-Boot
> > > support for LoongArch is still WIP.
> > > 
> > > Thanks for your time and review.
> > > 
> > > [1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e
> > > 
> > > Yao Zi (4):
> > >    dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
> > >    dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
> > >    LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
> > >    LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi
> > > 
> > >   .../bindings/loongarch/loongson.yaml          |   5 +
> > >   .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
> > >   arch/loongarch/boot/dts/Makefile              |   1 +
> > >   arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
> > >   .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
> > >   5 files changed, 246 insertions(+)
> > >   create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > >   create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-
> > > nineninepi.dts
> > 
> > For all the patch sets:
> > 
> > Reviewed-by: Yanteng Si <si.yanteng@linux.dev>
> I'm sorry. As there is no consensus yet on the name
> of the development board, could you please refrain
> from picking my R_B until this discussion is completed?
> Thank you so much for your understanding and cooperation!

Sure. Anyway, thanks for your time and review!

> Thanks,
> Yanteng

Best regards,
Yao Zi

> > 
> > Thanks,
> > Yanteng
> > > 
> > 
> 
>