From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81E87330525; Mon, 5 May 2025 22:35:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746484542; cv=none; b=D3WTmHNKsXHD+3zGyHH/r7IrbabzwTgCFE0N107x/oJxSD5AhlVjMM7NjJhaDCRBRx1tJOqOmM/Vslpa1DEbTJW5NoPW3fhTxMbtRXJKUVU8OnHXvyUwc7+fz++HoSaiDEXj1Hes98STgU3khMmRMlXnia6DGnow7FXL3w7RTcY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746484542; c=relaxed/simple; bh=L/OthiSv6yERIaO+4+2xO/McM2RAL614VKbYxKRQIoo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fjVygNowTO5pNdPlKmCjc3kysAOTX0WHijtEaowmSSDU6eIoQapIWn/3FzEH9z+tNsSaxmgtRSW7fTyoZcIE9oKcziJzbJVQ/MCTTIKvuFRM4ZjNZuGRe50w3NGOcSznY3JjOVn74bDfclrydX6EQHSDINqV/QOqUco8WCFduSA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hU6TG/Ge; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hU6TG/Ge" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3AE25C4CEE4; Mon, 5 May 2025 22:35:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746484541; bh=L/OthiSv6yERIaO+4+2xO/McM2RAL614VKbYxKRQIoo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hU6TG/GeS5bgNeqYgGRI4cTg41mV+vzKVUD88qvaXX1/b+FFg1q/dsB5Sf216xo7c PdmOJu1OMRi9tX77l3MqKvBdVZJnNiKCDz+q3NhnQOlv0vhQ0TQQGtyV+3KsC9Ft1y 3VFWViqsy/5Vtlqz9RVZ1Mr8p969/siABoW+MOsHNUMdfPuRuLodZ5BVauN9eUz+pg /7JgMee83hbxPNrSgzHobA6uvjLpneaWGB6VLZPRCCWE9oR+wVblV9aR1vOJgspobC NVTiuOxCKH/3L9OsoQJs5wpWW+HIJX9g7RacpHEgjBP0UEXLXv/VNkkxRck5IwWJEX 7nEkaLSt5G41Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Bitterblue Smith , Ping-Ke Shih , Sasha Levin , linux-wireless@vger.kernel.org Subject: [PATCH AUTOSEL 6.14 524/642] wifi: rtw88: Fix download_firmware_validate() for RTL8814AU Date: Mon, 5 May 2025 18:12:20 -0400 Message-Id: <20250505221419.2672473-524-sashal@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250505221419.2672473-1-sashal@kernel.org> References: <20250505221419.2672473-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.14.5 Content-Transfer-Encoding: 8bit From: Bitterblue Smith [ Upstream commit 9e8243025cc06abc975c876dffda052073207ab3 ] After the firmware is uploaded, download_firmware_validate() checks some bits in REG_MCUFW_CTRL to see if everything went okay. The RTL8814AU power on sequence sets bits 13 and 12 to 2, which this function does not expect, so it thinks the firmware upload failed. Make download_firmware_validate() ignore bits 13 and 12. Signed-off-by: Bitterblue Smith Acked-by: Ping-Ke Shih Signed-off-by: Ping-Ke Shih Link: https://patch.msgid.link/049d2887-22fc-47b7-9e59-62627cb525f8@gmail.com Signed-off-by: Sasha Levin --- drivers/net/wireless/realtek/rtw88/reg.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h index e438405fba566..209b6fc08a73e 100644 --- a/drivers/net/wireless/realtek/rtw88/reg.h +++ b/drivers/net/wireless/realtek/rtw88/reg.h @@ -130,6 +130,7 @@ #define BIT_SHIFT_ROM_PGE 16 #define BIT_FW_INIT_RDY BIT(15) #define BIT_FW_DW_RDY BIT(14) +#define BIT_CPU_CLK_SEL (BIT(12) | BIT(13)) #define BIT_RPWM_TOGGLE BIT(7) #define BIT_RAM_DL_SEL BIT(7) /* legacy only */ #define BIT_DMEM_CHKSUM_OK BIT(6) @@ -147,7 +148,7 @@ BIT_CHECK_SUM_OK) #define FW_READY_LEGACY (BIT_MCUFWDL_RDY | BIT_FWDL_CHK_RPT | \ BIT_WINTINI_RDY | BIT_RAM_DL_SEL) -#define FW_READY_MASK 0xffff +#define FW_READY_MASK (0xffff & ~BIT_CPU_CLK_SEL) #define REG_MCU_TST_CFG 0x84 #define VAL_FW_TRIGGER 0x1 -- 2.39.5