[PATCH 0/3] AMD gpu deadcoding (S)

[PATCH 0/3] AMD gpu deadcoding (S)

[linux]

From: "Dr. David Alan Gilbert" <linux@treblig.org>

Hi,
  A bunch more deadcode around the AMD GPUs.
(I've not done smu_v14 which all looks rather new
to me, so perhaps you're still intending to use
some of the unused functions).

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>


Dr. David Alan Gilbert (3):
  drm/amd/pm/smu7: Remove unused smu7_copy_bytes_from_smc
  drm/amd/pm/smu11: Remove unused smu_v11_0_get_dpm_level_range
  drm/amd/pm/smu13: Remove unused smu_v3 functions

 .../drm/amd/pm/powerplay/smumgr/smu7_smumgr.c |  36 -------
 .../drm/amd/pm/powerplay/smumgr/smu7_smumgr.h |   2 -
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h  |   5 -
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h  |  12 ---
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    |  39 -------
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    | 101 ------------------
 6 files changed, 195 deletions(-)

-- 
2.49.0

[PATCH 1/3] drm/amd/pm/smu7: Remove unused smu7_copy_bytes_from_smc

[linux]

From: "Dr. David Alan Gilbert" <linux@treblig.org>

smu7_copy_bytes_from_smc() was added in 2016 by
commit 1ff55f465103 ("drm/amd/powerplay: implement smu7_smumgr for asics
with smu ip version 7.")

but never used.

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
---
 .../drm/amd/pm/powerplay/smumgr/smu7_smumgr.c | 36 -------------------
 .../drm/amd/pm/powerplay/smumgr/smu7_smumgr.h |  2 --
 2 files changed, 38 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
index 5a010cd38303..baf51cd82a35 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
@@ -46,42 +46,6 @@ static int smu7_set_smc_sram_address(struct pp_hwmgr *hwmgr, uint32_t smc_addr,
 }
 
 
-int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address, uint32_t *dest, uint32_t byte_count, uint32_t limit)
-{
-	uint32_t data;
-	uint32_t addr;
-	uint8_t *dest_byte;
-	uint8_t i, data_byte[4] = {0};
-	uint32_t *pdata = (uint32_t *)&data_byte;
-
-	PP_ASSERT_WITH_CODE((0 == (3 & smc_start_address)), "SMC address must be 4 byte aligned.", return -EINVAL);
-	PP_ASSERT_WITH_CODE((limit > (smc_start_address + byte_count)), "SMC address is beyond the SMC RAM area.", return -EINVAL);
-
-	addr = smc_start_address;
-
-	while (byte_count >= 4) {
-		smu7_read_smc_sram_dword(hwmgr, addr, &data, limit);
-
-		*dest = PP_SMC_TO_HOST_UL(data);
-
-		dest += 1;
-		byte_count -= 4;
-		addr += 4;
-	}
-
-	if (byte_count) {
-		smu7_read_smc_sram_dword(hwmgr, addr, &data, limit);
-		*pdata = PP_SMC_TO_HOST_UL(data);
-	/* Cast dest into byte type in dest_byte.  This way, we don't overflow if the allocated memory is not 4-byte aligned. */
-		dest_byte = (uint8_t *)dest;
-		for (i = 0; i < byte_count; i++)
-			dest_byte[i] = data_byte[i];
-	}
-
-	return 0;
-}
-
-
 int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
 				const uint8_t *src, uint32_t byte_count, uint32_t limit)
 {
diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h
index e7303dc8c260..63e428ceaee4 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h
@@ -53,8 +53,6 @@ struct smu7_smumgr {
 };
 
 
-int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
-				uint32_t *dest, uint32_t byte_count, uint32_t limit);
 int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
 			const uint8_t *src, uint32_t byte_count, uint32_t limit);
 int smu7_program_jump_on_start(struct pp_hwmgr *hwmgr);
-- 
2.49.0

[PATCH 2/3] drm/amd/pm/smu11: Remove unused smu_v11_0_get_dpm_level_range

[linux]

From: "Dr. David Alan Gilbert" <linux@treblig.org>

The last use of smu_v11_0_get_dpm_level_range() was removed in 2020 by
commit 46a301e14e8a ("drm/amd/powerplay: drop unnecessary Navi1x specific
APIs")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
---
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h  |  5 ---
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 39 -------------------
 2 files changed, 44 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
index ed8304d82831..56ae555bb52a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
@@ -281,11 +281,6 @@ int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
 				   enum smu_clk_type clk_type,
 				   struct smu_11_0_dpm_table *single_dpm_table);
 
-int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
-				  enum smu_clk_type clk_type,
-				  uint32_t *min_value,
-				  uint32_t *max_value);
-
 int smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu);
 
 uint16_t smu_v11_0_get_current_pcie_link_width(struct smu_context *smu);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 25fabf336a64..78e4186d06cc 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -2059,45 +2059,6 @@ int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
 	return 0;
 }
 
-int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
-				  enum smu_clk_type clk_type,
-				  uint32_t *min_value,
-				  uint32_t *max_value)
-{
-	uint32_t level_count = 0;
-	int ret = 0;
-
-	if (!min_value && !max_value)
-		return -EINVAL;
-
-	if (min_value) {
-		/* by default, level 0 clock value as min value */
-		ret = smu_v11_0_get_dpm_freq_by_index(smu,
-						      clk_type,
-						      0,
-						      min_value);
-		if (ret)
-			return ret;
-	}
-
-	if (max_value) {
-		ret = smu_v11_0_get_dpm_level_count(smu,
-						    clk_type,
-						    &level_count);
-		if (ret)
-			return ret;
-
-		ret = smu_v11_0_get_dpm_freq_by_index(smu,
-						      clk_type,
-						      level_count - 1,
-						      max_value);
-		if (ret)
-			return ret;
-	}
-
-	return ret;
-}
-
 int smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu)
 {
 	struct amdgpu_device *adev = smu->adev;
-- 
2.49.0

[PATCH 3/3] drm/amd/pm/smu13: Remove unused smu_v3 functions

[linux]

From: "Dr. David Alan Gilbert" <linux@treblig.org>

smu_v13_0_display_clock_voltage_request() and
smu_v13_0_set_min_deep_sleep_dcefclk() were added in 2020 by
commit c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support (v3)")
but have remained unused.

Remove them.

smu_v13_0_display_clock_voltage_request() was the only user
of smu_v13_0_set_hard_freq_limited_range().  Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
---
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h  |  12 ---
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    | 101 ------------------
 2 files changed, 113 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index cd03caffe317..6f74783472e5 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -183,13 +183,6 @@ int smu_v13_0_disable_thermal_alert(struct smu_context *smu);
 
 int smu_v13_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value);
 
-int smu_v13_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
-
-int
-smu_v13_0_display_clock_voltage_request(struct smu_context *smu,
-					struct pp_display_clock_request
-					*clock_req);
-
 uint32_t
 smu_v13_0_get_fan_control_mode(struct smu_context *smu);
 
@@ -226,11 +219,6 @@ int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c
 int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
 					  uint32_t min, uint32_t max, bool automatic);
 
-int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,
-					  enum smu_clk_type clk_type,
-					  uint32_t min,
-					  uint32_t max);
-
 int smu_v13_0_set_performance_level(struct smu_context *smu,
 				    enum amd_dpm_forced_level level);
 
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index ba5a9012dbd5..03242f65e262 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -709,18 +709,6 @@ int smu_v13_0_notify_memory_pool_location(struct smu_context *smu)
 	return ret;
 }
 
-int smu_v13_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
-{
-	int ret;
-
-	ret = smu_cmn_send_smc_msg_with_param(smu,
-					      SMU_MSG_SetMinDeepSleepDcefclk, clk, NULL);
-	if (ret)
-		dev_err(smu->adev->dev, "SMU13 attempt to set divider for DCEFCLK Failed!");
-
-	return ret;
-}
-
 int smu_v13_0_set_driver_table_location(struct smu_context *smu)
 {
 	struct smu_table *driver_table = &smu->smu_table.driver_table;
@@ -1073,56 +1061,6 @@ int smu_v13_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
 
 }
 
-int
-smu_v13_0_display_clock_voltage_request(struct smu_context *smu,
-					struct pp_display_clock_request
-					*clock_req)
-{
-	enum amd_pp_clock_type clk_type = clock_req->clock_type;
-	int ret = 0;
-	enum smu_clk_type clk_select = 0;
-	uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
-
-	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) ||
-	    smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {
-		switch (clk_type) {
-		case amd_pp_dcef_clock:
-			clk_select = SMU_DCEFCLK;
-			break;
-		case amd_pp_disp_clock:
-			clk_select = SMU_DISPCLK;
-			break;
-		case amd_pp_pixel_clock:
-			clk_select = SMU_PIXCLK;
-			break;
-		case amd_pp_phy_clock:
-			clk_select = SMU_PHYCLK;
-			break;
-		case amd_pp_mem_clock:
-			clk_select = SMU_UCLK;
-			break;
-		default:
-			dev_info(smu->adev->dev, "[%s] Invalid Clock Type!", __func__);
-			ret = -EINVAL;
-			break;
-		}
-
-		if (ret)
-			goto failed;
-
-		if (clk_select == SMU_UCLK && smu->disable_uclk_switch)
-			return 0;
-
-		ret = smu_v13_0_set_hard_freq_limited_range(smu, clk_select, clk_freq, 0);
-
-		if (clk_select == SMU_UCLK)
-			smu->hard_min_uclk_req_from_dal = clk_freq;
-	}
-
-failed:
-	return ret;
-}
-
 uint32_t smu_v13_0_get_fan_control_mode(struct smu_context *smu)
 {
 	if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT))
@@ -1647,45 +1585,6 @@ int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu,
 	return ret;
 }
 
-int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,
-					  enum smu_clk_type clk_type,
-					  uint32_t min,
-					  uint32_t max)
-{
-	int ret = 0, clk_id = 0;
-	uint32_t param;
-
-	if (min <= 0 && max <= 0)
-		return -EINVAL;
-
-	if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type))
-		return 0;
-
-	clk_id = smu_cmn_to_asic_specific_index(smu,
-						CMN2ASIC_MAPPING_CLK,
-						clk_type);
-	if (clk_id < 0)
-		return clk_id;
-
-	if (max > 0) {
-		param = (uint32_t)((clk_id << 16) | (max & 0xffff));
-		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMaxByFreq,
-						      param, NULL);
-		if (ret)
-			return ret;
-	}
-
-	if (min > 0) {
-		param = (uint32_t)((clk_id << 16) | (min & 0xffff));
-		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinByFreq,
-						      param, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return ret;
-}
-
 int smu_v13_0_set_performance_level(struct smu_context *smu,
 				    enum amd_dpm_forced_level level)
 {
-- 
2.49.0

Re: [PATCH 3/3] drm/amd/pm/smu13: Remove unused smu_v3 functions

[Alex Deucher]

Applied the series.  Thanks!

Alex

On Tue, May 6, 2025 at 8:33 PM <linux@treblig.org> wrote:
>
> From: "Dr. David Alan Gilbert" <linux@treblig.org>
>
> smu_v13_0_display_clock_voltage_request() and
> smu_v13_0_set_min_deep_sleep_dcefclk() were added in 2020 by
> commit c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support (v3)")
> but have remained unused.
>
> Remove them.
>
> smu_v13_0_display_clock_voltage_request() was the only user
> of smu_v13_0_set_hard_freq_limited_range().  Remove it.
>
> Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h  |  12 ---
>  .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    | 101 ------------------
>  2 files changed, 113 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> index cd03caffe317..6f74783472e5 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> @@ -183,13 +183,6 @@ int smu_v13_0_disable_thermal_alert(struct smu_context *smu);
>
>  int smu_v13_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value);
>
> -int smu_v13_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
> -
> -int
> -smu_v13_0_display_clock_voltage_request(struct smu_context *smu,
> -                                       struct pp_display_clock_request
> -                                       *clock_req);
> -
>  uint32_t
>  smu_v13_0_get_fan_control_mode(struct smu_context *smu);
>
> @@ -226,11 +219,6 @@ int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c
>  int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
>                                           uint32_t min, uint32_t max, bool automatic);
>
> -int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,
> -                                         enum smu_clk_type clk_type,
> -                                         uint32_t min,
> -                                         uint32_t max);
> -
>  int smu_v13_0_set_performance_level(struct smu_context *smu,
>                                     enum amd_dpm_forced_level level);
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> index ba5a9012dbd5..03242f65e262 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> @@ -709,18 +709,6 @@ int smu_v13_0_notify_memory_pool_location(struct smu_context *smu)
>         return ret;
>  }
>
> -int smu_v13_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
> -{
> -       int ret;
> -
> -       ret = smu_cmn_send_smc_msg_with_param(smu,
> -                                             SMU_MSG_SetMinDeepSleepDcefclk, clk, NULL);
> -       if (ret)
> -               dev_err(smu->adev->dev, "SMU13 attempt to set divider for DCEFCLK Failed!");
> -
> -       return ret;
> -}
> -
>  int smu_v13_0_set_driver_table_location(struct smu_context *smu)
>  {
>         struct smu_table *driver_table = &smu->smu_table.driver_table;
> @@ -1073,56 +1061,6 @@ int smu_v13_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
>
>  }
>
> -int
> -smu_v13_0_display_clock_voltage_request(struct smu_context *smu,
> -                                       struct pp_display_clock_request
> -                                       *clock_req)
> -{
> -       enum amd_pp_clock_type clk_type = clock_req->clock_type;
> -       int ret = 0;
> -       enum smu_clk_type clk_select = 0;
> -       uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
> -
> -       if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) ||
> -           smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {
> -               switch (clk_type) {
> -               case amd_pp_dcef_clock:
> -                       clk_select = SMU_DCEFCLK;
> -                       break;
> -               case amd_pp_disp_clock:
> -                       clk_select = SMU_DISPCLK;
> -                       break;
> -               case amd_pp_pixel_clock:
> -                       clk_select = SMU_PIXCLK;
> -                       break;
> -               case amd_pp_phy_clock:
> -                       clk_select = SMU_PHYCLK;
> -                       break;
> -               case amd_pp_mem_clock:
> -                       clk_select = SMU_UCLK;
> -                       break;
> -               default:
> -                       dev_info(smu->adev->dev, "[%s] Invalid Clock Type!", __func__);
> -                       ret = -EINVAL;
> -                       break;
> -               }
> -
> -               if (ret)
> -                       goto failed;
> -
> -               if (clk_select == SMU_UCLK && smu->disable_uclk_switch)
> -                       return 0;
> -
> -               ret = smu_v13_0_set_hard_freq_limited_range(smu, clk_select, clk_freq, 0);
> -
> -               if (clk_select == SMU_UCLK)
> -                       smu->hard_min_uclk_req_from_dal = clk_freq;
> -       }
> -
> -failed:
> -       return ret;
> -}
> -
>  uint32_t smu_v13_0_get_fan_control_mode(struct smu_context *smu)
>  {
>         if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT))
> @@ -1647,45 +1585,6 @@ int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu,
>         return ret;
>  }
>
> -int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,
> -                                         enum smu_clk_type clk_type,
> -                                         uint32_t min,
> -                                         uint32_t max)
> -{
> -       int ret = 0, clk_id = 0;
> -       uint32_t param;
> -
> -       if (min <= 0 && max <= 0)
> -               return -EINVAL;
> -
> -       if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type))
> -               return 0;
> -
> -       clk_id = smu_cmn_to_asic_specific_index(smu,
> -                                               CMN2ASIC_MAPPING_CLK,
> -                                               clk_type);
> -       if (clk_id < 0)
> -               return clk_id;
> -
> -       if (max > 0) {
> -               param = (uint32_t)((clk_id << 16) | (max & 0xffff));
> -               ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMaxByFreq,
> -                                                     param, NULL);
> -               if (ret)
> -                       return ret;
> -       }
> -
> -       if (min > 0) {
> -               param = (uint32_t)((clk_id << 16) | (min & 0xffff));
> -               ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinByFreq,
> -                                                     param, NULL);
> -               if (ret)
> -                       return ret;
> -       }
> -
> -       return ret;
> -}
> -
>  int smu_v13_0_set_performance_level(struct smu_context *smu,
>                                     enum amd_dpm_forced_level level)
>  {
> --
> 2.49.0
>