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From: Rob Herring <robh@kernel.org>
To: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
Cc: thierry.bultel@linatsea.fr, linux-renesas-soc@vger.kernel.org,
	geert@linux-m68k.org, paul.barker.ct@bp.renesas.com,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for RZ/T2H RSCI
Date: Fri, 9 May 2025 13:58:58 -0500	[thread overview]
Message-ID: <20250509185858.GA3933854-robh@kernel.org> (raw)
In-Reply-To: <20250429081956.3804621-2-thierry.bultel.yh@bp.renesas.com>

On Tue, Apr 29, 2025 at 10:19:43AM +0200, Thierry Bultel wrote:
> At boot, the default clock is the PCLKM core lock (synchronous
> clock, which is enabled by the bootloader).
> For different baudrates, the asynchronous clock input must be used.
> Clock selection is made by an internal register of RCSI.
> 
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
> ---
>  .../bindings/serial/renesas,rsci.yaml          | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> index ea879db5f485..aa2428837a2f 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> @@ -35,10 +35,14 @@ properties:
>        - const: tei
>  
>    clocks:
> -    maxItems: 1
> +    items:
> +      - description: serial functional clock
> +      - description: default core clock
>  
>    clock-names:
> -    const: fck # UART functional clock
> +    items:
> +      - const: async
> +      - const: bus

This is an ABI change. You can't just drop 'fck' without good reasons.

Rob

  parent reply	other threads:[~2025-05-09 18:59 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20250429081956.3804621-1-thierry.bultel.yh@bp.renesas.com>
2025-04-29  8:19 ` [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for RZ/T2H RSCI Thierry Bultel
2025-04-29 14:48   ` Hugo Villeneuve
2025-05-09 18:58   ` Rob Herring [this message]
2025-05-13  9:40     ` Geert Uytterhoeven
2025-05-13  9:38   ` Geert Uytterhoeven
2025-05-13 13:17     ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 02/11] dt-bindings: soc: Add Renesas RZ/T2H (R9A09G077) SoC Thierry Bultel
2025-05-13  9:20   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 03/11] dt-bindings: clock: Add cpg for the Renesas RZ/T2H SoC Thierry Bultel
2025-04-29 15:01   ` Rob Herring (Arm)
2025-05-13 10:00   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 04/11] soc: renesas: Add RZ/T2H (R9A09G077) config option Thierry Bultel
2025-04-29  8:19 ` [PATCH v8 05/11] clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register Thierry Bultel
2025-05-13 10:10   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 06/11] clk: renesas: Add support for R9A09G077 SoC Thierry Bultel
2025-05-13 12:09   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 07/11] serial: sh-sci: Use private port ID Thierry Bultel
2025-05-13 12:59   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 08/11] serial: sh-sci: Add support for RZ/T2H SCI Thierry Bultel
2025-05-02  1:15   ` kernel test robot
2025-05-13 13:29   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 09/11] arm64: dts: renesas: Add initial support for renesas RZ/T2H SoC Thierry Bultel
2025-05-13 13:34   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 10/11] arm64: dts: renesas: Add initial support for renesas RZ/T2H eval board Thierry Bultel
2025-05-13 13:38   ` Geert Uytterhoeven
2025-04-29  8:19 ` [PATCH v8 11/11] arm64: defconfig: Enable Renesas RZ/T2H serial SCI Thierry Bultel
2025-05-13 13:39   ` Geert Uytterhoeven

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