* [PATCH v2 0/2] x86/cpuid: Headers cleanup
@ 2025-05-15 20:21 Ahmed S. Darwish
2025-05-15 20:21 ` [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc Ahmed S. Darwish
2025-05-15 20:21 ` [PATCH v2 2/2] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base() Ahmed S. Darwish
0 siblings, 2 replies; 6+ messages in thread
From: Ahmed S. Darwish @ 2025-05-15 20:21 UTC (permalink / raw)
To: Ingo Molnar, Borislav Petkov, Dave Hansen
Cc: Thomas Gleixner, Andrew Cooper, H. Peter Anvin, John Ogness, x86,
x86-cpuid, LKML, Ahmed S. Darwish
Hi,
Most of the patch queue's v1 is now merged at tip:x86/core.
On top of that, introduce a kernel-doc fixup (Sorry, missed that).
Then, do the renames:
hypervisor_cpuid_base() ➤ cpuid_base_hypervisor()
for_…_hypervisor_cpuid_base() ➤ for_…_cpuid_base_hypervisor()
instead of:
hypervisor_cpuid_base() ➤ cpuid_hypervisor_base()
for_…_hypervisor_cpuid_base() ➤ for_…_cpuid_hypervisor_base()
to keep "cpuid_base" in one peace:
https://lore.kernel.org/x86-cpuid/aCYY7CE57Al9ydWa@gmail.com
Thanks!
Cover v1
--------
( [PATCH v1 0/9] x86/cpuid: Headers cleanup
https://lore.kernel.org/lkml/20250508150240.172915-1-darwi@linutronix.de )
This is a CPUID headers cleanup series, on top of tip:x86/cpu. It is a
precursor for the upcoming v2 of the CPUID parser:
[PATCH v1 00/26] x86: Introduce centralized CPUID model
https://lore.kernel.org/lkml/20250506050437.10264-1-darwi@linutronix.de
as suggested by Ingo here:
https://lore.kernel.org/lkml/aBnSgu_JyEi8fvog@gmail.com
* Summary:
The current CPUID header structure is:
include/asm/
├── cpuid
│ ├── api.h
│ ├── leaf_0x2_api.h
│ └── types.h
└── cpuid.h
Simplify it into:
include/asm/cpuid/
├── api.h
└── types.h
Standardize the CPUID header namespace by enforcing a "cpuid_" prefix for
all exported symbols. That is:
have_cpuid_p() ➤ cpuid_feature()
hypervisor_cpuid_base() ➤ cpuid_hypervisor_base()
native_cpuid() ➤ cpuid_native()
native_cpuid_REG() ➤ cpuid_REG_native()
Also rename:
cpuid_get_leaf_0x2_regs() ➤ cpuid_leaf_0x2()
for consistency with the other <asm/cpuid/api.h> accessors that return
full CPUID register output; i.e., cpuid_leaf() and cpuid_subleaf().
Finally, rename:
for_each_leaf_0x2_entry() ➤ for_each_cpuid_0x2_desc()
to include "cpuid" in the iterator name, and since what is being iterated
upon is CPUID(0x2) cache and TLB "descriptos", not "entries".
* Testing:
- Basic one-by-one allyesconfig compilation
- Comparison of a before/after of below files:
- /proc/cpuinfo
- /sys/devices/system/cpu/
- /sys/kernel/debug/x86/topo/
- dmesg --notime | grep 'Last level [id]TLB entries'
Thanks,
8<-----
Ahmed S. Darwish (2):
x86/cpuid: Fix CPUID(0x2) iterator kernel-doc
x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base()
arch/x86/include/asm/acrn.h | 2 +-
arch/x86/include/asm/cpuid/api.h | 18 +++++++++---------
arch/x86/include/asm/xen/hypervisor.h | 2 +-
arch/x86/kernel/jailhouse.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
arch/x86/kvm/cpuid.c | 2 +-
6 files changed, 14 insertions(+), 14 deletions(-)
base-commit: 234792ea4421499f123e73b2e6411469a561a123
--
2.49.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc
2025-05-15 20:21 [PATCH v2 0/2] x86/cpuid: Headers cleanup Ahmed S. Darwish
@ 2025-05-15 20:21 ` Ahmed S. Darwish
2025-05-16 8:50 ` Ingo Molnar
2025-05-15 20:21 ` [PATCH v2 2/2] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base() Ahmed S. Darwish
1 sibling, 1 reply; 6+ messages in thread
From: Ahmed S. Darwish @ 2025-05-15 20:21 UTC (permalink / raw)
To: Ingo Molnar, Borislav Petkov, Dave Hansen
Cc: Thomas Gleixner, Andrew Cooper, H. Peter Anvin, John Ogness, x86,
x86-cpuid, LKML, Ahmed S. Darwish
The CPUID(0x2) cache/TLB descriptors iterator has been recently changed
from:
for_each_leaf_0x2_entry(regs, __ptr, entry)
to:
for_each_cpuid_0x2_desc(_regs, _ptr, _desc)
but the attached kernel-doc was not fully adapted. Fix it.
Fixes: c4c9ea879c3b ("x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2()")
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
---
arch/x86/include/asm/cpuid/api.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index bf97f9770789..ccf20c62b89f 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -252,15 +252,15 @@ static inline void cpuid_leaf_0x2(union leaf_0x2_regs *regs)
/**
* for_each_cpuid_0x2_desc() - Iterator for parsed CPUID(0x2) descriptors
- * @regs: CPUID(0x2) register output, as returned by cpuid_leaf_0x2()
- * @__ptr: u8 pointer, for macro internal use only
- * @desc: Pointer to parsed CPUID(0x2) descriptor at each iteration
+ * @_regs: CPUID(0x2) register output, as returned by cpuid_leaf_0x2()
+ * @_ptr: u8 pointer, for macro internal use only
+ * @_desc: Pointer to the parsed CPUID(0x2) descriptor at each iteration
*
* Loop over the 1-byte descriptors in the passed CPUID(0x2) output registers
- * @regs. Provide the parsed information for each descriptor through @desc.
+ * @_regs. Provide the parsed information for each descriptor through @_desc.
*
- * To handle cache-specific descriptors, switch on @entry->c_type. For TLB
- * descriptors, switch on @entry->t_type.
+ * To handle cache-specific descriptors, switch on @_desc->c_type. For TLB
+ * descriptors, switch on @_desc->t_type.
*
* Example usage for cache descriptors::
*
--
2.49.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base()
2025-05-15 20:21 [PATCH v2 0/2] x86/cpuid: Headers cleanup Ahmed S. Darwish
2025-05-15 20:21 ` [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc Ahmed S. Darwish
@ 2025-05-15 20:21 ` Ahmed S. Darwish
2025-05-15 20:28 ` [PATCH v3] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_base_hypervisor() Ahmed S. Darwish
1 sibling, 1 reply; 6+ messages in thread
From: Ahmed S. Darwish @ 2025-05-15 20:21 UTC (permalink / raw)
To: Ingo Molnar, Borislav Petkov, Dave Hansen
Cc: Thomas Gleixner, Andrew Cooper, H. Peter Anvin, John Ogness, x86,
x86-cpuid, LKML, Ahmed S. Darwish
In order to let all the APIs under <cpuid/api.h> have a shared "cpuid_"
namespace, rename hypervisor_cpuid_base() to cpuid_base_hypervisor().
To align with the new style, also rename:
for_each_possible_hypervisor_cpuid_base(function)
to:
for_each_possible_cpuid_base_hypervisor(function)
Adjust call-sites accordingly.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
---
arch/x86/include/asm/acrn.h | 2 +-
arch/x86/include/asm/cpuid/api.h | 6 +++---
arch/x86/include/asm/xen/hypervisor.h | 2 +-
arch/x86/kernel/jailhouse.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
arch/x86/kvm/cpuid.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index 1dd14381bcb6..fab11192c60a 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -25,7 +25,7 @@ void acrn_remove_intr_handler(void);
static inline u32 acrn_cpuid_base(void)
{
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base("ACRNACRNACRN", 0);
+ return cpuid_base_hypervisor("ACRNACRNACRN", 0);
return 0;
}
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index ccf20c62b89f..44fa82e1267c 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -188,14 +188,14 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
return false;
}
-#define for_each_possible_hypervisor_cpuid_base(function) \
+#define for_each_possible_cpuid_base_hypervisor(function) \
for (function = 0x40000000; function < 0x40010000; function += 0x100)
-static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
+static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves)
{
u32 base, eax, signature[3];
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
/*
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index bd0fc69a10a7..c2fc7869b996 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -43,7 +43,7 @@ extern struct start_info *xen_start_info;
static inline uint32_t xen_cpuid_base(void)
{
- return hypervisor_cpuid_base(XEN_SIGNATURE, 2);
+ return cpuid_base_hypervisor(XEN_SIGNATURE, 2);
}
struct pci_dev;
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index cd8ed1edbf9e..9e9a591a5fec 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -49,7 +49,7 @@ static uint32_t jailhouse_cpuid_base(void)
!boot_cpu_has(X86_FEATURE_HYPERVISOR))
return 0;
- return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
+ return cpuid_base_hypervisor("Jailhouse\0\0\0", 0);
}
static uint32_t __init jailhouse_detect(void)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index f3642226e0a5..921c1c783bc1 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -875,7 +875,7 @@ static noinline uint32_t __kvm_cpuid_base(void)
return 0; /* So we don't blow up on old processors */
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base(KVM_SIGNATURE, 0);
+ return cpuid_base_hypervisor(KVM_SIGNATURE, 0);
return 0;
}
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 7f43d8d24fbe..ecd85f4801cc 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -236,7 +236,7 @@ static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcp
struct kvm_cpuid_entry2 *entry;
u32 base;
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
entry = kvm_find_cpuid_entry(vcpu, base);
if (entry) {
--
2.49.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_base_hypervisor()
2025-05-15 20:21 ` [PATCH v2 2/2] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base() Ahmed S. Darwish
@ 2025-05-15 20:28 ` Ahmed S. Darwish
2025-05-16 9:19 ` [tip: x86/core] x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor() tip-bot2 for Ahmed S. Darwish
0 siblings, 1 reply; 6+ messages in thread
From: Ahmed S. Darwish @ 2025-05-15 20:28 UTC (permalink / raw)
To: Ingo Molnar, Borislav Petkov, Dave Hansen
Cc: Thomas Gleixner, Andrew Cooper, H. Peter Anvin, John Ogness, x86,
x86-cpuid, LKML
In order to let all the APIs under <cpuid/api.h> have a shared "cpuid_"
namespace, rename hypervisor_cpuid_base() to cpuid_base_hypervisor().
To align with the new style, also rename:
for_each_possible_hypervisor_cpuid_base(function)
to:
for_each_possible_cpuid_base_hypervisor(function)
Adjust call-sites accordingly.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
---
Changelog-v3: Fix commit subject line to include the new function name,
cpuid_base_hypervisor().
arch/x86/include/asm/acrn.h | 2 +-
arch/x86/include/asm/cpuid/api.h | 6 +++---
arch/x86/include/asm/xen/hypervisor.h | 2 +-
arch/x86/kernel/jailhouse.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
arch/x86/kvm/cpuid.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index 1dd14381bcb6..fab11192c60a 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -25,7 +25,7 @@ void acrn_remove_intr_handler(void);
static inline u32 acrn_cpuid_base(void)
{
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base("ACRNACRNACRN", 0);
+ return cpuid_base_hypervisor("ACRNACRNACRN", 0);
return 0;
}
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index ccf20c62b89f..44fa82e1267c 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -188,14 +188,14 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
return false;
}
-#define for_each_possible_hypervisor_cpuid_base(function) \
+#define for_each_possible_cpuid_base_hypervisor(function) \
for (function = 0x40000000; function < 0x40010000; function += 0x100)
-static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
+static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves)
{
u32 base, eax, signature[3];
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
/*
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index bd0fc69a10a7..c2fc7869b996 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -43,7 +43,7 @@ extern struct start_info *xen_start_info;
static inline uint32_t xen_cpuid_base(void)
{
- return hypervisor_cpuid_base(XEN_SIGNATURE, 2);
+ return cpuid_base_hypervisor(XEN_SIGNATURE, 2);
}
struct pci_dev;
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index cd8ed1edbf9e..9e9a591a5fec 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -49,7 +49,7 @@ static uint32_t jailhouse_cpuid_base(void)
!boot_cpu_has(X86_FEATURE_HYPERVISOR))
return 0;
- return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
+ return cpuid_base_hypervisor("Jailhouse\0\0\0", 0);
}
static uint32_t __init jailhouse_detect(void)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index f3642226e0a5..921c1c783bc1 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -875,7 +875,7 @@ static noinline uint32_t __kvm_cpuid_base(void)
return 0; /* So we don't blow up on old processors */
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base(KVM_SIGNATURE, 0);
+ return cpuid_base_hypervisor(KVM_SIGNATURE, 0);
return 0;
}
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 7f43d8d24fbe..ecd85f4801cc 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -236,7 +236,7 @@ static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcp
struct kvm_cpuid_entry2 *entry;
u32 base;
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
entry = kvm_find_cpuid_entry(vcpu, base);
if (entry) {
--
2.49.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc
2025-05-15 20:21 ` [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc Ahmed S. Darwish
@ 2025-05-16 8:50 ` Ingo Molnar
0 siblings, 0 replies; 6+ messages in thread
From: Ingo Molnar @ 2025-05-16 8:50 UTC (permalink / raw)
To: Ahmed S. Darwish
Cc: Ingo Molnar, Borislav Petkov, Dave Hansen, Thomas Gleixner,
Andrew Cooper, H. Peter Anvin, John Ogness, x86, x86-cpuid, LKML
* Ahmed S. Darwish <darwi@linutronix.de> wrote:
> The CPUID(0x2) cache/TLB descriptors iterator has been recently changed
> from:
>
> for_each_leaf_0x2_entry(regs, __ptr, entry)
>
> to:
>
> for_each_cpuid_0x2_desc(_regs, _ptr, _desc)
>
> but the attached kernel-doc was not fully adapted. Fix it.
>
> Fixes: c4c9ea879c3b ("x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2()")
> Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
I've folded this fix back into the originator commit.
Thanks,
Ingo
^ permalink raw reply [flat|nested] 6+ messages in thread
* [tip: x86/core] x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor()
2025-05-15 20:28 ` [PATCH v3] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_base_hypervisor() Ahmed S. Darwish
@ 2025-05-16 9:19 ` tip-bot2 for Ahmed S. Darwish
0 siblings, 0 replies; 6+ messages in thread
From: tip-bot2 for Ahmed S. Darwish @ 2025-05-16 9:19 UTC (permalink / raw)
To: linux-tip-commits
Cc: Ingo Molnar, Ahmed S. Darwish, Andrew Cooper, Dave Hansen,
David Woodhouse, H. Peter Anvin, John Ogness, Paolo Bonzini,
Sean Christopherson, Vitaly Kuznetsov, x86-cpuid, x86,
linux-kernel
The following commit has been merged into the x86/core branch of tip:
Commit-ID: 3bf8ce828419810f45a272948805cf9a2b685529
Gitweb: https://git.kernel.org/tip/3bf8ce828419810f45a272948805cf9a2b685529
Author: Ahmed S. Darwish <darwi@linutronix.de>
AuthorDate: Thu, 15 May 2025 22:28:59 +02:00
Committer: Ingo Molnar <mingo@kernel.org>
CommitterDate: Fri, 16 May 2025 10:54:47 +02:00
x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor()
In order to let all the APIs under <cpuid/api.h> have a shared "cpuid_"
namespace, rename hypervisor_cpuid_base() to cpuid_base_hypervisor().
To align with the new style, also rename:
for_each_possible_hypervisor_cpuid_base(function)
to:
for_each_possible_cpuid_base_hypervisor(function)
Adjust call-sites accordingly.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/aCZOi0Oohc7DpgTo@lx-t490
---
arch/x86/include/asm/acrn.h | 2 +-
arch/x86/include/asm/cpuid/api.h | 6 +++---
arch/x86/include/asm/xen/hypervisor.h | 2 +-
arch/x86/kernel/jailhouse.c | 2 +-
arch/x86/kernel/kvm.c | 2 +-
arch/x86/kvm/cpuid.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index 1dd1438..fab1119 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -25,7 +25,7 @@ void acrn_remove_intr_handler(void);
static inline u32 acrn_cpuid_base(void)
{
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base("ACRNACRNACRN", 0);
+ return cpuid_base_hypervisor("ACRNACRNACRN", 0);
return 0;
}
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index ccf20c6..44fa82e 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -188,14 +188,14 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
return false;
}
-#define for_each_possible_hypervisor_cpuid_base(function) \
+#define for_each_possible_cpuid_base_hypervisor(function) \
for (function = 0x40000000; function < 0x40010000; function += 0x100)
-static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
+static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves)
{
u32 base, eax, signature[3];
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
/*
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index bd0fc69..c2fc786 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -43,7 +43,7 @@ extern struct start_info *xen_start_info;
static inline uint32_t xen_cpuid_base(void)
{
- return hypervisor_cpuid_base(XEN_SIGNATURE, 2);
+ return cpuid_base_hypervisor(XEN_SIGNATURE, 2);
}
struct pci_dev;
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index cd8ed1e..9e9a591 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -49,7 +49,7 @@ static uint32_t jailhouse_cpuid_base(void)
!boot_cpu_has(X86_FEATURE_HYPERVISOR))
return 0;
- return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
+ return cpuid_base_hypervisor("Jailhouse\0\0\0", 0);
}
static uint32_t __init jailhouse_detect(void)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index f364222..921c1c7 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -875,7 +875,7 @@ static noinline uint32_t __kvm_cpuid_base(void)
return 0; /* So we don't blow up on old processors */
if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
- return hypervisor_cpuid_base(KVM_SIGNATURE, 0);
+ return cpuid_base_hypervisor(KVM_SIGNATURE, 0);
return 0;
}
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 7f43d8d..ecd85f4 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -236,7 +236,7 @@ static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcp
struct kvm_cpuid_entry2 *entry;
u32 base;
- for_each_possible_hypervisor_cpuid_base(base) {
+ for_each_possible_cpuid_base_hypervisor(base) {
entry = kvm_find_cpuid_entry(vcpu, base);
if (entry) {
^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-05-16 9:19 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-15 20:21 [PATCH v2 0/2] x86/cpuid: Headers cleanup Ahmed S. Darwish
2025-05-15 20:21 ` [PATCH v2 1/2] x86/cpuid: Fix CPUID(0x2) iterator kernel-doc Ahmed S. Darwish
2025-05-16 8:50 ` Ingo Molnar
2025-05-15 20:21 ` [PATCH v2 2/2] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_hypervisor_base() Ahmed S. Darwish
2025-05-15 20:28 ` [PATCH v3] x86/cpuid: Rename hypervisor_cpuid_base() to cpuid_base_hypervisor() Ahmed S. Darwish
2025-05-16 9:19 ` [tip: x86/core] x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor() tip-bot2 for Ahmed S. Darwish
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