[PATCH 00/13] TI-K3-DTS: Cleanup CPSW DT Nodes

[PATCH 00/13] TI-K3-DTS: Cleanup CPSW DT Nodes

[Siddharth Vadapalli]

Hello,

This series cleans up the CPSW Device-tree nodes by updating the SoC and
board files to keep CPSW disabled in the SoC files and enable it only in
the board files.

The following is a summary of the SoCs, CPSW instance and the Boards that
this series affects:

-----    -------    ----------------  --------------------------------------------
S.No.      SoC        CPSW Instance                    Board(s)
-----    -------    ----------------  --------------------------------------------
  1.       AM62          CPSW3G           AM625-Beagleplay, AM62-LP-SK, AM625-SK
  2.       AM65        MCU CPSW2G         AM654-Base-Board, IOT-2050 Based Boards
  3.       J7200       MCU CPSW2G         J7200-Common-Processor-Board
  4.       J721E       MCU CPSW2G         J721E-Common-Processor-Board
  5.       J721S2      MCU CPSW2G         J721S2-Common-Processor-Board

Series is based on linux-next tagged next-20250529.

I am posting this series to receive feedback and Reviewed-by / Tested-by tags.
I will repost the series when the merge window opens.

Logs:
1. AM625-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/aa812fda8c0653f387931bb90f12cdd0
2. AM654-Base-Board:
https://gist.github.com/Siddharth-Vadapalli-at-TI/128b7ef2e0c371db4c8b3a4c4ddefcc6
3. J7200-Common-Processor-Board:
https://gist.github.com/Siddharth-Vadapalli-at-TI/66837169f7370faa2dae05cb39bdaad5
4. J721E-Common-Processor-Board:
https://gist.github.com/Siddharth-Vadapalli-at-TI/ad0f12f9aab3cd9b55f221062c53493d
5. J721S2-Common-Processor-Board:
https://gist.github.com/Siddharth-Vadapalli-at-TI/07dd468558f90d7637f8536d935d2368

Regards,
Siddharth.

Siddharth Vadapalli (13):
  arm64: dts: ti: k3-am625-beagleplay: Enable "cpsw3g" in the board file
  arm64: dts: ti: k3-am62-lp-sk: Enable "cpsw3g" in the board file
  arm64: dts: ti: k3-am625-sk: Enable "cpsw3g" in the board file
  arm64: dts: ti: k3-am62-main: Disable "cpsw3g" in the SoC file
  arm64: dts: ti: k3-am654-base-board: Enable "mcu_cpsw" in board file
  arm64: dts: ti: k3-am65-mcu: Disable "mcu_cpsw" in the SoC file
  arm64: dts: ti: iot2050-common: Remove redundant "mcu_cpsw" node
    status
  arm64: dts: ti: k3-j7200-common-proc-board: Enable "mcu_cpsw" in board
    file
  arm64: dts: ti: k3-j7200-mcu-wakeup: Disable "mcu_cpsw" in the SoC
    file
  arm64: dts: ti: k3-j721e-common-proc-board: Enable "mcu_cpsw" in board
    file
  arm64: dts: ti: k3-j721e-mcu-wakeup: Disable "mcu_cpsw" in the SoC
    file
  arm64: dts: ti: k3-j721s2-common-proc-board: Enable "mcu_cpsw" in
    board file
  arm64: dts: ti: k3-j721s2-mcu-wakeup: Disable "mcu_cpsw" in the SoC
    file

 arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts               | 4 ++++
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi               | 2 ++
 arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts         | 1 +
 arch/arm64/boot/dts/ti/k3-am625-sk.dts                 | 1 +
 arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi     | 4 ----
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi                | 2 ++
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts         | 1 +
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts  | 1 +
 arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi        | 2 ++
 arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts  | 1 +
 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi        | 2 ++
 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 1 +
 arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi       | 2 ++
 13 files changed, 20 insertions(+), 4 deletions(-)

-- 
2.34.1

[PATCH 01/13] arm64: dts: ti: k3-am625-beagleplay: Enable "cpsw3g" in the board file

[Siddharth Vadapalli]

In preparation for disabling "cpsw3g" device-tree node in the SoC file,
namely "k3-am62-main.dtsi", enable it in the board file. The motivation
for this change is that of following the existing convention of disabling
nodes in the SoC file and only enabling the required ones in the board
file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
index 72b09f9c69d8..999f5baaba1a 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
@@ -585,6 +585,7 @@ &usb1 {
 };
 
 &cpsw3g {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii1_pins_default>, <&spe_pins_default>,
 		    <&gbe_pmx_obsclk>;
-- 
2.34.1

Re: [PATCH 01/13] arm64: dts: ti: k3-am625-beagleplay: Enable "cpsw3g" in the board file

[Krzysztof Kozlowski]

On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> In preparation for disabling "cpsw3g" device-tree node in the SoC file,
> namely "k3-am62-main.dtsi", enable it in the board file. The motivation
> for this change is that of following the existing convention of disabling
> nodes in the SoC file and only enabling the required ones in the board
> file.


That's not separate commit. You disable in DTSI and enable in DTS in the
same one, to avoid any duplicated statuses like in this case (even if
one is default).



Best regards,
Krzysztof

Re: [PATCH 01/13] arm64: dts: ti: k3-am625-beagleplay: Enable "cpsw3g" in the board file

[Siddharth Vadapalli]

On Thu, May 29, 2025 at 03:37:22PM +0200, Krzysztof Kozlowski wrote:
> On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> > In preparation for disabling "cpsw3g" device-tree node in the SoC file,
> > namely "k3-am62-main.dtsi", enable it in the board file. The motivation
> > for this change is that of following the existing convention of disabling
> > nodes in the SoC file and only enabling the required ones in the board
> > file.
> 
> 
> That's not separate commit. You disable in DTSI and enable in DTS in the
> same one, to avoid any duplicated statuses like in this case (even if
> one is default).

I will squash the commits. Thank you for reviewing the patch.

Regards,
Siddharth.

[PATCH 02/13] arm64: dts: ti: k3-am62-lp-sk: Enable "cpsw3g" in the board file

[Siddharth Vadapalli]

In preparation for disabling "cpsw3g" device-tree node in the SoC file,
namely "k3-am62-main.dtsi", enable it in the board file. The motivation
for this change is that of following the existing convention of disabling
nodes in the SoC file and only enabling the required ones in the board
file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
index aafdb90c0eb7..cec77fba24e6 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
@@ -149,6 +149,10 @@ &sdhci1 {
 	vqmmc-supply = <&vddshv_sdio>;
 };
 
+&cpsw3g {
+	status = "okay";
+};
+
 &cpsw_port2 {
 	status = "disabled";
 };
-- 
2.34.1

[PATCH 03/13] arm64: dts: ti: k3-am625-sk: Enable "cpsw3g" in the board file

[Siddharth Vadapalli]

In preparation for disabling "cpsw3g" device-tree node in the SoC file,
namely "k3-am62-main.dtsi", enable it in the board file. The motivation
for this change is that of following the existing convention of disabling
nodes in the SoC file and only enabling the required ones in the board
file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am625-sk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
index 2fbfa3719345..9c2258dfd08d 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
@@ -201,6 +201,7 @@ &sdhci1 {
 };
 
 &cpsw3g {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
 };
-- 
2.34.1

[PATCH 04/13] arm64: dts: ti: k3-am62-main: Disable "cpsw3g" in the SoC file

[Siddharth Vadapalli]

Following the existing convention of disabling nodes in the SoC file and
enabling only the required ones in the board file, disable "cpsw3g" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 9e0b6eee9ac7..3d8650e7c80b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -724,6 +724,8 @@ cpsw3g: ethernet@8000000 {
 		dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
 			    "tx7", "rx";
 
+		status = "disabled";
+
 		ethernet-ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

[PATCH 05/13] arm64: dts: ti: k3-am654-base-board: Enable "mcu_cpsw" in board file

[Siddharth Vadapalli]

In preparation for disabling "cpsw3g" device-tree node in the SoC file,
namely "k3-am65-mcu.dtsi", enable it in the board file. The motivation
for this change is that of following the existing convention of disabling
nodes in the SoC file and only enabling the required ones in the board
file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index c30425960398..d2632d1f8eb7 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -606,6 +606,7 @@ partition@3fe0000 {
 };
 
 &mcu_cpsw {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>;
 };
-- 
2.34.1

[PATCH 06/13] arm64: dts: ti: k3-am65-mcu: Disable "mcu_cpsw" in the SoC file

[Siddharth Vadapalli]

Following the existing convention of disabling nodes in the SoC file and
enabling only the required ones in the board file, disable "mcu_cpsw" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 7cf1f646500a..cd0b796c5f8f 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -354,6 +354,8 @@ mcu_cpsw: ethernet@46000000 {
 			    "tx4", "tx5", "tx6", "tx7",
 			    "rx";
 
+		status = "disabled";
+
 		ethernet-ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

[PATCH 07/13] arm64: dts: ti: iot2050-common: Remove redundant "mcu_cpsw" node status

[Siddharth Vadapalli]

Now that the SoC file "k3-am65-mcu.dtsi" disables the "mcu_cpsw" node by
default, following the existing convention of disabling nodes in the SoC
file, remove the redundant section for disabling the "mcu_cpsw" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index e5136ed94765..48e740eb0088 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -475,10 +475,6 @@ &main_i2c3 {
 	#size-cells = <0>;
 };
 
-&mcu_cpsw {
-	status = "disabled";
-};
-
 &sdhci1 {
 	status = "okay";
 	pinctrl-names = "default";
-- 
2.34.1

Re: [PATCH 07/13] arm64: dts: ti: iot2050-common: Remove redundant "mcu_cpsw" node status

[Krzysztof Kozlowski]

On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> Now that the SoC file "k3-am65-mcu.dtsi" disables the "mcu_cpsw" node by
> default, following the existing convention of disabling nodes in the SoC
> file, remove the redundant section for disabling the "mcu_cpsw" node.

It became redundant when you disabled it, so this must be part of that
commit. Do not create redundant code with some artificial split of one
logical work.


Best regards,
Krzysztof

Re: [PATCH 07/13] arm64: dts: ti: iot2050-common: Remove redundant "mcu_cpsw" node status

[Siddharth Vadapalli]

On Thu, May 29, 2025 at 03:38:51PM +0200, Krzysztof Kozlowski wrote:
> On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> > Now that the SoC file "k3-am65-mcu.dtsi" disables the "mcu_cpsw" node by
> > default, following the existing convention of disabling nodes in the SoC
> > file, remove the redundant section for disabling the "mcu_cpsw" node.
> 
> It became redundant when you disabled it, so this must be part of that
> commit. Do not create redundant code with some artificial split of one
> logical work.

Sure, I will squash the commits. I tend to split the commits since it is
easier for maintainers to squash commits (if required) than to split them.
Thank you for reviewing the patch.

Regards,
Siddharth.

[PATCH 08/13] arm64: dts: ti: k3-j7200-common-proc-board: Enable "mcu_cpsw" in board file

[Siddharth Vadapalli]

In preparation for disabling "mcu_cpsw" device-tree node in the SoC file,
namely "k3-j7200-mcu-wakeup.dtsi", enable it in the board file.

The motivation for this change is that of following the existing convention
of disabling nodes in the SoC file and only enabling the required ones in
the board file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index f684ce6ad9ad..021cdeb84ad1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -321,6 +321,7 @@ &wkup_gpio0 {
 };
 
 &mcu_cpsw {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
-- 
2.34.1

[PATCH 09/13] arm64: dts: ti: k3-j7200-mcu-wakeup: Disable "mcu_cpsw" in the SoC file

[Siddharth Vadapalli]

Following the existing convention of disabling nodes in the SoC file and
enabling only the required ones in the board file, disable "mcu_cpsw" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 56ab144fea07..604295092d06 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -432,6 +432,8 @@ mcu_cpsw: ethernet@46000000 {
 			    "tx4", "tx5", "tx6", "tx7",
 			    "rx";
 
+		status = "disabled";
+
 		ethernet-ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

[PATCH 10/13] arm64: dts: ti: k3-j721e-common-proc-board: Enable "mcu_cpsw" in board file

[Siddharth Vadapalli]

In preparation for disabling "mcu_cpsw" device-tree node in the SoC file,
namely "k3-j721e-mcu-wakeup.dtsi", enable it in the board file.

The motivation for this change is that of following the existing convention
of disabling nodes in the SoC file and only enabling the required ones in
the board file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 45311438315f..eda85dafb794 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -767,6 +767,7 @@ exp5: gpio@20 {
 };
 
 &mcu_cpsw {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
-- 
2.34.1

[PATCH 11/13] arm64: dts: ti: k3-j721e-mcu-wakeup: Disable "mcu_cpsw" in the SoC file

[Siddharth Vadapalli]

Following the existing convention of disabling nodes in the SoC file and
enabling only the required ones in the board file, disable "mcu_cpsw" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index b02142b2b460..dd923540ca0a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -551,6 +551,8 @@ mcu_cpsw: ethernet@46000000 {
 			    "tx4", "tx5", "tx6", "tx7",
 			    "rx";
 
+		status = "disabled";
+
 		ethernet-ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

[PATCH 12/13] arm64: dts: ti: k3-j721s2-common-proc-board: Enable "mcu_cpsw" in board file

[Siddharth Vadapalli]

In preparation for disabling "mcu_cpsw" device-tree node in the SoC file,
namely "k3-j721s2-mcu-wakeup.dtsi", enable it in the board file.

The motivation for this change is that of following the existing convention
of disabling nodes in the SoC file and only enabling the required ones in
the board file.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index e2fc1288ed07..a482b3ad5095 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -409,6 +409,7 @@ &main_sdhci1 {
 };
 
 &mcu_cpsw {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
-- 
2.34.1

[PATCH 13/13] arm64: dts: ti: k3-j721s2-mcu-wakeup: Disable "mcu_cpsw" in the SoC file

[Siddharth Vadapalli]

Following the existing convention of disabling nodes in the SoC file and
enabling only the required ones in the board file, disable "mcu_cpsw" node.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index bc31266126d0..b5fd012d9564 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -552,6 +552,8 @@ mcu_cpsw: ethernet@46000000 {
 			    "tx4", "tx5", "tx6", "tx7",
 			    "rx";
 
+		status = "disabled";
+
 		ethernet-ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.34.1

Re: [PATCH 13/13] arm64: dts: ti: k3-j721s2-mcu-wakeup: Disable "mcu_cpsw" in the SoC file

[Krzysztof Kozlowski]

On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> Following the existing convention of disabling nodes in the SoC file and
> enabling only the required ones in the board file, disable "mcu_cpsw" node.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
Really all of this is fake split. One line per commit.

Best regards,
Krzysztof

Re: [PATCH 13/13] arm64: dts: ti: k3-j721s2-mcu-wakeup: Disable "mcu_cpsw" in the SoC file

[Siddharth Vadapalli]

On Thu, May 29, 2025 at 03:38:10PM +0200, Krzysztof Kozlowski wrote:
> On 29/05/2025 15:34, Siddharth Vadapalli wrote:
> > Following the existing convention of disabling nodes in the SoC file and
> > enabling only the required ones in the board file, disable "mcu_cpsw" node.
> > 
> > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> > ---
> >  arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> Really all of this is fake split. One line per commit.

I split the patches into Board and SoC specific changes. I was following
the split used when we add new device-tree nodes:
- Add the node to SoC file in the first commit
- Enable it in the Board file in the next commit

Since this is a cleanup, the above split may not be required and I
understand that. I will squash the changes in the next version of this
series.

Thank you for your feedback.

Regards,
Siddharth.