[PATCH v2 0/3] remoteproc: imx_rproc: Support i.MX95

[PATCH v2 0/3] remoteproc: imx_rproc: Support i.MX95

[Peng Fan (OSS)]

i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
one Cortex-M7 core. The System Control Management Interface(SCMI)
firmware runs on the M33 core. The i.MX95 SCMI firmware named System
Manager(SM) includes vendor extension protocols, Logical Machine
Management(LMM) protocol and CPU protocol and etc.

There are three cases for M7:
(1) M7 in a separate Logical Machine(LM) that Linux couldn't control it.
(2) M7 in a separate Logical Machine that Linux could control it using
    LMM protocol
(3) M7 runs in same Logical Machine as A55, so Linux could control it
    using CPU protocol

In patch 1, add fsl,lmm-id and fsl,cpu-id to indicate LM ID and CPU ID
In patch 2, Use LMM and CPU protocol to manage M7. More info could be
found in the patch commit log

Current setup relies on pre-Linux software(U-Boot) to do
M7 TCM ECC initialization. In future, we could add the support in Linux
to decouple U-Boot and Linux.

Patchset was tested with below boot images when the patchset based on next-20250526:
imx-boot-variant-rpmsg-imx95-19x19-lpddr5-evk-sd.bin-flash_lpboot_sm_a55 (Use LMM protocol)
imx-boot-variant-alt-imx95-19x19-lpddr5-evk-sd.bin-flash_alt (Use CPU protocol)
imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_a55 (M7 not under A55 control)
imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_all (M7 not under A55 control)

Patchset is re-based on next-20250603.

Thanks for Daniel helping review the patchset before posting out to list.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v2:
- Typo fix in patch 2 commit message
- Move the m7 address mapping array from patch 2 to patch 3
- Add R-b from Daniel to patch 3
- Link to v1: https://lore.kernel.org/r/20250604-imx95-rproc-1-v1-0-a6e5f512731c@nxp.com

---
Peng Fan (3):
      dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95
      remoteproc: imx_rproc: Add support for System Manager API
      remoteproc: imx_rproc: Add support for i.MX95

 .../bindings/remoteproc/fsl,imx-rproc.yaml         |  27 ++++
 drivers/remoteproc/imx_rproc.c                     | 146 ++++++++++++++++++++-
 drivers/remoteproc/imx_rproc.h                     |   2 +
 3 files changed, 173 insertions(+), 2 deletions(-)
---
base-commit: b79c044712e34fe49e7b85ffafd0bd460b5c4afa
change-id: 20250525-imx95-rproc-1-20bb74ddc8af

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX95 has a System Manager(SM) core runs the System Control Management
Interface(SCMI) firmware. Vendor extenions are implemented in the
firmware, Logical Machine Management(LMM) protocol to manage
Logical Machines and CPU protocol to manage cores. The documentation
could be found in file drivers/firmware/arm_scmi/vendors/imx/imx95.rst.

Add below to support i.MX95
 - compatible string for i.MX95 M7
 - fsl,lmm-id to indicate the LMM ID of M7 LM
 - fsl,cpu-id to indicate the CPU ID of M7

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../bindings/remoteproc/fsl,imx-rproc.yaml         | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
index 57d75acb0b5e52ca49d1361176fdebc18a0bf7a2..a3ffab60df52be6f1d7cf4846ca5ba1c40f03bde 100644
--- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
@@ -28,6 +28,7 @@ properties:
       - fsl,imx8qxp-cm4
       - fsl,imx8ulp-cm33
       - fsl,imx93-cm33
+      - fsl,imx95-cm7
 
   clocks:
     maxItems: 1
@@ -68,6 +69,12 @@ properties:
       Indicate whether need to load the default firmware and start the remote
       processor automatically.
 
+  fsl,cpu-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This property is to specify the CPU ID of the remote processor
+      in SoC which supports System Manager
+
   fsl,entry-address:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
@@ -78,6 +85,12 @@ properties:
     description:
       Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
 
+  fsl,lmm-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This property is to specify the Logical Machine ID of the remote processor
+      in SoC which supports System Manager
+
   fsl,resource-id:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
@@ -114,6 +127,20 @@ allOf:
       properties:
         power-domains: false
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx95-cm7
+    then:
+      required:
+        - fsl,lmm-id
+        - fsl,cpu-id
+    else:
+      properties:
+        fsl,lmm-id: false
+        fsl,cpu-id: false
+
 additionalProperties: false
 
 examples:

-- 
2.37.1

[PATCH v2 2/3] remoteproc: imx_rproc: Add support for System Manager API

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
one Cortex-M7 core. The System Control Management Interface(SCMI)
firmware runs on the M33 core. The i.MX95 SCMI firmware named System
Manager(SM) includes vendor extension protocols, Logical Machine
Management(LMM) protocol and CPU protocol and etc.

There are three cases for M7:
 (1) M7 in a separate Logical Machine(LM) that Linux can't control it.
 (2) M7 in a separate Logical Machine that Linux can control it using
     LMM protocol
 (3) M7 runs in same Logical Machine as A55, so Linux can control it
     using CPU protocol

So extend the driver to using LMM and CPU protocol to manage the M7 core.
 - Add IMX_RPROC_SM to indicate the remote core runs on a SoC that
   has System Manager.
 - Compare linux LM ID(got using scmi_imx_lmm_info) and M7 LM ID(got
   from DTB), if same, use CPU protocol to start/stop. Otherwise, use
   LMM protocol to start/stop.
   Whether using CPU or LMM protocol to start/stop, the M7 status
   detection could use CPU protocol to detect started or not. So
   in imx_rproc_detect_mode, use scmi_imx_cpu_started to check the
   status of M7.
 - For above case 1 and 2, Use SCMI_IMX_LMM_POWER_ON to detect whether
   the M7 LM is under control of A55 LM.

Current setup relies on pre-Linux software(U-Boot) to do
M7 TCM ECC initialization. In future, we could add the support in Linux
to decouple U-Boot and Linux.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/remoteproc/imx_rproc.c | 127 ++++++++++++++++++++++++++++++++++++++++-
 drivers/remoteproc/imx_rproc.h |   2 +
 2 files changed, 127 insertions(+), 2 deletions(-)

diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 74299af1d7f10a0db794de494c52304b2323b89f..8fe3c76c9b30ed9e66d4e8c8e2e178a21f3b5bd2 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -8,6 +8,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/firmware/imx/sci.h>
+#include <linux/firmware/imx/sm.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/mailbox_client.h>
@@ -21,6 +22,7 @@
 #include <linux/reboot.h>
 #include <linux/regmap.h>
 #include <linux/remoteproc.h>
+#include <linux/scmi_imx_protocol.h>
 #include <linux/workqueue.h>
 
 #include "imx_rproc.h"
@@ -91,6 +93,11 @@ struct imx_rproc_mem {
 #define ATT_CORE_MASK   0xffff
 #define ATT_CORE(I)     BIT((I))
 
+/* Logical Machine Operation */
+#define IMX_RPROC_FLAGS_SM_LMM_OP	BIT(0)
+/* Linux has permission to handle the Logical Machine of remote cores */
+#define IMX_RPROC_FLAGS_SM_LMM_AVAIL	BIT(1)
+
 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block);
 static void imx_rproc_free_mbox(struct rproc *rproc);
 
@@ -115,6 +122,10 @@ struct imx_rproc {
 	u32				entry;		/* cpu start address */
 	u32				core_index;
 	struct dev_pm_domain_list	*pd_list;
+	/* For i.MX System Manager based systems */
+	u32				cpuid;
+	u32				lmid;
+	u32				flags;
 };
 
 static const struct imx_rproc_att imx_rproc_att_imx93[] = {
@@ -393,6 +404,30 @@ static int imx_rproc_start(struct rproc *rproc)
 	case IMX_RPROC_SCU_API:
 		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry);
 		break;
+	case IMX_RPROC_SM:
+		if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
+			if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL))
+				return -EACCES;
+
+			ret = scmi_imx_lmm_reset_vector_set(priv->lmid, priv->cpuid, 0, 0);
+			if (ret) {
+				dev_err(dev, "Failed to set reset vector lmid(%u), cpuid(%u): %d\n",
+					priv->lmid, priv->cpuid, ret);
+			}
+
+			ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_BOOT, 0);
+			if (ret)
+				dev_err(dev, "Failed to boot lmm(%d): %d\n", ret, priv->lmid);
+		} else {
+			ret = scmi_imx_cpu_reset_vector_set(priv->cpuid, 0, true, false, false);
+			if (ret) {
+				dev_err(dev, "Failed to set reset vector cpuid(%u): %d\n",
+					priv->cpuid, ret);
+			}
+
+			ret = scmi_imx_cpu_start(priv->cpuid, true);
+		}
+		break;
 	default:
 		return -EOPNOTSUPP;
 	}
@@ -435,6 +470,16 @@ static int imx_rproc_stop(struct rproc *rproc)
 	case IMX_RPROC_SCU_API:
 		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry);
 		break;
+	case IMX_RPROC_SM:
+		if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
+			if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL)
+				ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_SHUTDOWN, 0);
+			else
+				ret = -EACCES;
+		} else {
+			ret = scmi_imx_cpu_start(priv->cpuid, false);
+		}
+		break;
 	default:
 		return -EOPNOTSUPP;
 	}
@@ -549,9 +594,11 @@ static int imx_rproc_prepare(struct rproc *rproc)
 {
 	struct imx_rproc *priv = rproc->priv;
 	struct device_node *np = priv->dev->of_node;
+	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
 	struct of_phandle_iterator it;
 	struct rproc_mem_entry *mem;
 	struct reserved_mem *rmem;
+	int ret;
 	u32 da;
 
 	/* Register associated reserved memory regions */
@@ -592,6 +639,38 @@ static int imx_rproc_prepare(struct rproc *rproc)
 		rproc_add_carveout(rproc, mem);
 	}
 
+	switch (dcfg->method) {
+	case IMX_RPROC_SM:
+		if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP))
+			break;
+		/*
+		 * Power on the Logical Machine to make sure TCM is available.
+		 * Also serve as permission check. If in different Logical
+		 * Machine, and linux has permission to handle the Logical
+		 * Machine, set IMX_RPROC_FLAGS_SM_LMM_AVAIL.
+		 */
+		ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_POWER_ON, 0);
+		if (ret == 0) {
+			dev_info(priv->dev, "lmm(%d) powered on\n", priv->lmid);
+			priv->flags |= IMX_RPROC_FLAGS_SM_LMM_AVAIL;
+		} else if (ret == -EACCES) {
+			dev_info(priv->dev, "lmm(%d) not under Linux Control\n", priv->lmid);
+			/*
+			 * If remote cores boots up, continue the rpmsg channel setup,
+			 * else linux have no permission, so return -EACCES.
+			 */
+			if (priv->rproc->state != RPROC_DETACHED)
+				return -EACCES;
+		} else if (ret) {
+			dev_err(priv->dev, "Failed to power on lmm(%d): %d\n", ret, priv->lmid);
+			return ret;
+		}
+
+		break;
+	default:
+		break;
+	};
+
 	return  0;
 }
 
@@ -911,13 +990,53 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
 	struct regmap_config config = { .name = "imx-rproc" };
 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
 	struct device *dev = priv->dev;
+	struct scmi_imx_lmm_info info;
 	struct regmap *regmap;
 	struct arm_smccc_res res;
+	bool started = false;
 	int ret;
 	u32 val;
 	u8 pt;
 
 	switch (dcfg->method) {
+	case IMX_RPROC_SM:
+		/* Get current Linux Logical Machine ID */
+		ret = scmi_imx_lmm_info(LMM_ID_DISCOVER, &info);
+		if (ret) {
+			dev_err(dev, "Failed to get current LMM ID err: %d\n", ret);
+			return ret;
+		}
+
+		ret = of_property_read_u32(dev->of_node, "fsl,cpu-id", &priv->cpuid);
+		if (ret) {
+			dev_err(dev, "No fsl,cpu-id property\n");
+			return ret;
+		}
+
+		ret = of_property_read_u32(dev->of_node, "fsl,lmm-id", &priv->lmid);
+		if (ret) {
+			dev_info(dev, "No fsl,lmm-id property\n");
+			return ret;
+		}
+
+		/*
+		 * Check whether remote processor is in same Logical Machine as Linux.
+		 * If no, need use Logical Machine API to manage remote processor, and
+		 * set IMX_RPROC_FLAGS_SM_LMM_OP.
+		 * If yes, use CPU protocol API to manage remote processor.
+		 */
+		if (priv->lmid != info.lmid) {
+			priv->flags |= IMX_RPROC_FLAGS_SM_LMM_OP;
+			dev_info(dev, "Using LMM Protocol OPS\n");
+		} else {
+			dev_info(dev, "Using CPU Protocol OPS\n");
+		}
+
+		scmi_imx_cpu_started(priv->cpuid, &started);
+		if (started)
+			priv->rproc->state = RPROC_DETACHED;
+
+		return 0;
 	case IMX_RPROC_NONE:
 		priv->rproc->state = RPROC_DETACHED;
 		return 0;
@@ -1029,8 +1148,12 @@ static int imx_rproc_clk_enable(struct imx_rproc *priv)
 	struct device *dev = priv->dev;
 	int ret;
 
-	/* Remote core is not under control of Linux */
-	if (dcfg->method == IMX_RPROC_NONE)
+	/*
+	 * IMX_RPROC_NONE indicates not under control of Linux.
+	 * System Manager(SM) firmware automatically configures clock,
+	 * so bypass the clk settings for IMX_RPROC_SM.
+	 */
+	if (dcfg->method == IMX_RPROC_NONE || dcfg->method == IMX_RPROC_SM)
 		return 0;
 
 	priv->clk = devm_clk_get(dev, NULL);
diff --git a/drivers/remoteproc/imx_rproc.h b/drivers/remoteproc/imx_rproc.h
index cfd38d37e1467d1d9e6f89be146c0b53262b92a0..e3e851d88fb069a589531ea21a3790fd62fde57d 100644
--- a/drivers/remoteproc/imx_rproc.h
+++ b/drivers/remoteproc/imx_rproc.h
@@ -26,6 +26,8 @@ enum imx_rproc_method {
 	IMX_RPROC_SCU_API,
 	/* Through Reset Controller API */
 	IMX_RPROC_RESET_CONTROLLER,
+	/* Through System Manager */
+	IMX_RPROC_SM,
 };
 
 /* dcfg flags */

-- 
2.37.1

[PATCH v2 3/3] remoteproc: imx_rproc: Add support for i.MX95

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add imx_rproc_cfg_imx95_m7 and address(TCM and DDR) mapping
Add i.MX95 of_device_id entry

Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/remoteproc/imx_rproc.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 8fe3c76c9b30ed9e66d4e8c8e2e178a21f3b5bd2..53354c634d8a2e03e6064830cca4ead66e2eebdf 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -128,6 +128,18 @@ struct imx_rproc {
 	u32				flags;
 };
 
+static const struct imx_rproc_att imx_rproc_att_imx95_m7[] = {
+	/* dev addr , sys addr  , size	    , flags */
+	/* TCM CODE NON-SECURE */
+	{ 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
+
+	/* TCM SYS NON-SECURE*/
+	{ 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM },
+
+	/* DDR */
+	{ 0x80000000, 0x80000000, 0x50000000, 0 },
+};
+
 static const struct imx_rproc_att imx_rproc_att_imx93[] = {
 	/* dev addr , sys addr  , size	    , flags */
 	/* TCM CODE NON-SECURE */
@@ -374,6 +386,12 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
 	.method		= IMX_RPROC_SMC,
 };
 
+static const struct imx_rproc_dcfg imx_rproc_cfg_imx95_m7 = {
+	.att		= imx_rproc_att_imx95_m7,
+	.att_size	= ARRAY_SIZE(imx_rproc_att_imx95_m7),
+	.method		= IMX_RPROC_SM,
+};
+
 static int imx_rproc_start(struct rproc *rproc)
 {
 	struct imx_rproc *priv = rproc->priv;
@@ -1315,6 +1333,7 @@ static const struct of_device_id imx_rproc_of_match[] = {
 	{ .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm },
 	{ .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
 	{ .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 },
+	{ .compatible = "fsl,imx95-cm7", .data = &imx_rproc_cfg_imx95_m7 },
 	{},
 };
 MODULE_DEVICE_TABLE(of, imx_rproc_of_match);

-- 
2.37.1

Re: [PATCH v2 2/3] remoteproc: imx_rproc: Add support for System Manager API

[Mathieu Poirier]

Good day,

On Fri, Jun 06, 2025 at 09:55:13AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
> one Cortex-M7 core. The System Control Management Interface(SCMI)
> firmware runs on the M33 core. The i.MX95 SCMI firmware named System
> Manager(SM) includes vendor extension protocols, Logical Machine
> Management(LMM) protocol and CPU protocol and etc.
> 
> There are three cases for M7:
>  (1) M7 in a separate Logical Machine(LM) that Linux can't control it.
>  (2) M7 in a separate Logical Machine that Linux can control it using
>      LMM protocol
>  (3) M7 runs in same Logical Machine as A55, so Linux can control it
>      using CPU protocol
> 
> So extend the driver to using LMM and CPU protocol to manage the M7 core.
>  - Add IMX_RPROC_SM to indicate the remote core runs on a SoC that
>    has System Manager.
>  - Compare linux LM ID(got using scmi_imx_lmm_info) and M7 LM ID(got
>    from DTB), if same, use CPU protocol to start/stop. Otherwise, use
>    LMM protocol to start/stop.
>    Whether using CPU or LMM protocol to start/stop, the M7 status
>    detection could use CPU protocol to detect started or not. So
>    in imx_rproc_detect_mode, use scmi_imx_cpu_started to check the
>    status of M7.
>  - For above case 1 and 2, Use SCMI_IMX_LMM_POWER_ON to detect whether
>    the M7 LM is under control of A55 LM.
> 
> Current setup relies on pre-Linux software(U-Boot) to do
> M7 TCM ECC initialization. In future, we could add the support in Linux
> to decouple U-Boot and Linux.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/remoteproc/imx_rproc.c | 127 ++++++++++++++++++++++++++++++++++++++++-
>  drivers/remoteproc/imx_rproc.h |   2 +
>  2 files changed, 127 insertions(+), 2 deletions(-)
> 

I will look at this patch when either Daniel or Iuliana have given their R-B.

Thanks,
Mathieu

> diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
> index 74299af1d7f10a0db794de494c52304b2323b89f..8fe3c76c9b30ed9e66d4e8c8e2e178a21f3b5bd2 100644
> --- a/drivers/remoteproc/imx_rproc.c
> +++ b/drivers/remoteproc/imx_rproc.c
> @@ -8,6 +8,7 @@
>  #include <linux/clk.h>
>  #include <linux/err.h>
>  #include <linux/firmware/imx/sci.h>
> +#include <linux/firmware/imx/sm.h>
>  #include <linux/interrupt.h>
>  #include <linux/kernel.h>
>  #include <linux/mailbox_client.h>
> @@ -21,6 +22,7 @@
>  #include <linux/reboot.h>
>  #include <linux/regmap.h>
>  #include <linux/remoteproc.h>
> +#include <linux/scmi_imx_protocol.h>
>  #include <linux/workqueue.h>
>  
>  #include "imx_rproc.h"
> @@ -91,6 +93,11 @@ struct imx_rproc_mem {
>  #define ATT_CORE_MASK   0xffff
>  #define ATT_CORE(I)     BIT((I))
>  
> +/* Logical Machine Operation */
> +#define IMX_RPROC_FLAGS_SM_LMM_OP	BIT(0)
> +/* Linux has permission to handle the Logical Machine of remote cores */
> +#define IMX_RPROC_FLAGS_SM_LMM_AVAIL	BIT(1)
> +
>  static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block);
>  static void imx_rproc_free_mbox(struct rproc *rproc);
>  
> @@ -115,6 +122,10 @@ struct imx_rproc {
>  	u32				entry;		/* cpu start address */
>  	u32				core_index;
>  	struct dev_pm_domain_list	*pd_list;
> +	/* For i.MX System Manager based systems */
> +	u32				cpuid;
> +	u32				lmid;
> +	u32				flags;
>  };
>  
>  static const struct imx_rproc_att imx_rproc_att_imx93[] = {
> @@ -393,6 +404,30 @@ static int imx_rproc_start(struct rproc *rproc)
>  	case IMX_RPROC_SCU_API:
>  		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry);
>  		break;
> +	case IMX_RPROC_SM:
> +		if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
> +			if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL))
> +				return -EACCES;
> +
> +			ret = scmi_imx_lmm_reset_vector_set(priv->lmid, priv->cpuid, 0, 0);
> +			if (ret) {
> +				dev_err(dev, "Failed to set reset vector lmid(%u), cpuid(%u): %d\n",
> +					priv->lmid, priv->cpuid, ret);
> +			}
> +
> +			ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_BOOT, 0);
> +			if (ret)
> +				dev_err(dev, "Failed to boot lmm(%d): %d\n", ret, priv->lmid);
> +		} else {
> +			ret = scmi_imx_cpu_reset_vector_set(priv->cpuid, 0, true, false, false);
> +			if (ret) {
> +				dev_err(dev, "Failed to set reset vector cpuid(%u): %d\n",
> +					priv->cpuid, ret);
> +			}
> +
> +			ret = scmi_imx_cpu_start(priv->cpuid, true);
> +		}
> +		break;
>  	default:
>  		return -EOPNOTSUPP;
>  	}
> @@ -435,6 +470,16 @@ static int imx_rproc_stop(struct rproc *rproc)
>  	case IMX_RPROC_SCU_API:
>  		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry);
>  		break;
> +	case IMX_RPROC_SM:
> +		if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
> +			if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL)
> +				ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_SHUTDOWN, 0);
> +			else
> +				ret = -EACCES;
> +		} else {
> +			ret = scmi_imx_cpu_start(priv->cpuid, false);
> +		}
> +		break;
>  	default:
>  		return -EOPNOTSUPP;
>  	}
> @@ -549,9 +594,11 @@ static int imx_rproc_prepare(struct rproc *rproc)
>  {
>  	struct imx_rproc *priv = rproc->priv;
>  	struct device_node *np = priv->dev->of_node;
> +	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
>  	struct of_phandle_iterator it;
>  	struct rproc_mem_entry *mem;
>  	struct reserved_mem *rmem;
> +	int ret;
>  	u32 da;
>  
>  	/* Register associated reserved memory regions */
> @@ -592,6 +639,38 @@ static int imx_rproc_prepare(struct rproc *rproc)
>  		rproc_add_carveout(rproc, mem);
>  	}
>  
> +	switch (dcfg->method) {
> +	case IMX_RPROC_SM:
> +		if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP))
> +			break;
> +		/*
> +		 * Power on the Logical Machine to make sure TCM is available.
> +		 * Also serve as permission check. If in different Logical
> +		 * Machine, and linux has permission to handle the Logical
> +		 * Machine, set IMX_RPROC_FLAGS_SM_LMM_AVAIL.
> +		 */
> +		ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_POWER_ON, 0);
> +		if (ret == 0) {
> +			dev_info(priv->dev, "lmm(%d) powered on\n", priv->lmid);
> +			priv->flags |= IMX_RPROC_FLAGS_SM_LMM_AVAIL;
> +		} else if (ret == -EACCES) {
> +			dev_info(priv->dev, "lmm(%d) not under Linux Control\n", priv->lmid);
> +			/*
> +			 * If remote cores boots up, continue the rpmsg channel setup,
> +			 * else linux have no permission, so return -EACCES.
> +			 */
> +			if (priv->rproc->state != RPROC_DETACHED)
> +				return -EACCES;
> +		} else if (ret) {
> +			dev_err(priv->dev, "Failed to power on lmm(%d): %d\n", ret, priv->lmid);
> +			return ret;
> +		}
> +
> +		break;
> +	default:
> +		break;
> +	};
> +
>  	return  0;
>  }
>  
> @@ -911,13 +990,53 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
>  	struct regmap_config config = { .name = "imx-rproc" };
>  	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
>  	struct device *dev = priv->dev;
> +	struct scmi_imx_lmm_info info;
>  	struct regmap *regmap;
>  	struct arm_smccc_res res;
> +	bool started = false;
>  	int ret;
>  	u32 val;
>  	u8 pt;
>  
>  	switch (dcfg->method) {
> +	case IMX_RPROC_SM:
> +		/* Get current Linux Logical Machine ID */
> +		ret = scmi_imx_lmm_info(LMM_ID_DISCOVER, &info);
> +		if (ret) {
> +			dev_err(dev, "Failed to get current LMM ID err: %d\n", ret);
> +			return ret;
> +		}
> +
> +		ret = of_property_read_u32(dev->of_node, "fsl,cpu-id", &priv->cpuid);
> +		if (ret) {
> +			dev_err(dev, "No fsl,cpu-id property\n");
> +			return ret;
> +		}
> +
> +		ret = of_property_read_u32(dev->of_node, "fsl,lmm-id", &priv->lmid);
> +		if (ret) {
> +			dev_info(dev, "No fsl,lmm-id property\n");
> +			return ret;
> +		}
> +
> +		/*
> +		 * Check whether remote processor is in same Logical Machine as Linux.
> +		 * If no, need use Logical Machine API to manage remote processor, and
> +		 * set IMX_RPROC_FLAGS_SM_LMM_OP.
> +		 * If yes, use CPU protocol API to manage remote processor.
> +		 */
> +		if (priv->lmid != info.lmid) {
> +			priv->flags |= IMX_RPROC_FLAGS_SM_LMM_OP;
> +			dev_info(dev, "Using LMM Protocol OPS\n");
> +		} else {
> +			dev_info(dev, "Using CPU Protocol OPS\n");
> +		}
> +
> +		scmi_imx_cpu_started(priv->cpuid, &started);
> +		if (started)
> +			priv->rproc->state = RPROC_DETACHED;
> +
> +		return 0;
>  	case IMX_RPROC_NONE:
>  		priv->rproc->state = RPROC_DETACHED;
>  		return 0;
> @@ -1029,8 +1148,12 @@ static int imx_rproc_clk_enable(struct imx_rproc *priv)
>  	struct device *dev = priv->dev;
>  	int ret;
>  
> -	/* Remote core is not under control of Linux */
> -	if (dcfg->method == IMX_RPROC_NONE)
> +	/*
> +	 * IMX_RPROC_NONE indicates not under control of Linux.
> +	 * System Manager(SM) firmware automatically configures clock,
> +	 * so bypass the clk settings for IMX_RPROC_SM.
> +	 */
> +	if (dcfg->method == IMX_RPROC_NONE || dcfg->method == IMX_RPROC_SM)
>  		return 0;
>  
>  	priv->clk = devm_clk_get(dev, NULL);
> diff --git a/drivers/remoteproc/imx_rproc.h b/drivers/remoteproc/imx_rproc.h
> index cfd38d37e1467d1d9e6f89be146c0b53262b92a0..e3e851d88fb069a589531ea21a3790fd62fde57d 100644
> --- a/drivers/remoteproc/imx_rproc.h
> +++ b/drivers/remoteproc/imx_rproc.h
> @@ -26,6 +26,8 @@ enum imx_rproc_method {
>  	IMX_RPROC_SCU_API,
>  	/* Through Reset Controller API */
>  	IMX_RPROC_RESET_CONTROLLER,
> +	/* Through System Manager */
> +	IMX_RPROC_SM,
>  };
>  
>  /* dcfg flags */
> 
> -- 
> 2.37.1
> 

Re: [PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95

[Daniel Baluta]

On Fri, Jun 6, 2025 at 4:57 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> i.MX95 has a System Manager(SM) core runs the System Control Management
> Interface(SCMI) firmware. Vendor extenions are implemented in the
> firmware, Logical Machine Management(LMM) protocol to manage
> Logical Machines and CPU protocol to manage cores. The documentation
> could be found in file drivers/firmware/arm_scmi/vendors/imx/imx95.rst.
>
> Add below to support i.MX95
>  - compatible string for i.MX95 M7
>  - fsl,lmm-id to indicate the LMM ID of M7 LM
>  - fsl,cpu-id to indicate the CPU ID of M7
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../bindings/remoteproc/fsl,imx-rproc.yaml         | 27 ++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
> index 57d75acb0b5e52ca49d1361176fdebc18a0bf7a2..a3ffab60df52be6f1d7cf4846ca5ba1c40f03bde 100644
> --- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
> @@ -28,6 +28,7 @@ properties:
>        - fsl,imx8qxp-cm4
>        - fsl,imx8ulp-cm33
>        - fsl,imx93-cm33
> +      - fsl,imx95-cm7
>
>    clocks:
>      maxItems: 1
> @@ -68,6 +69,12 @@ properties:
>        Indicate whether need to load the default firmware and start the remote
>        processor automatically.
>
> +  fsl,cpu-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      This property is to specify the CPU ID of the remote processor
> +      in SoC which supports System Manager
> +
>    fsl,entry-address:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description:
> @@ -78,6 +85,12 @@ properties:
>      description:
>        Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
>
> +  fsl,lmm-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      This property is to specify the Logical Machine ID of the remote processor
> +      in SoC which supports System Manager
> +
>    fsl,resource-id:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description:
> @@ -114,6 +127,20 @@ allOf:
>        properties:
>          power-domains: false
>
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx95-cm7
> +    then:
> +      required:
> +        - fsl,lmm-id
> +        - fsl,cpu-id
> +    else:
> +      properties:
> +        fsl,lmm-id: false
> +        fsl,cpu-id: false

Hi Peng,

Can you remind me why do we need the else branch here?

I mean if the compatible is not fsl,imx95-cm7 then the properties
fsl,lmm-id and fsl,cpu-id are not required and I think that's fine.

Re: [PATCH v2 2/3] remoteproc: imx_rproc: Add support for System Manager API

[Daniel Baluta]

On Fri, Jun 6, 2025 at 4:57 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
> one Cortex-M7 core. The System Control Management Interface(SCMI)
> firmware runs on the M33 core. The i.MX95 SCMI firmware named System
> Manager(SM) includes vendor extension protocols, Logical Machine
> Management(LMM) protocol and CPU protocol and etc.
>
> There are three cases for M7:
>  (1) M7 in a separate Logical Machine(LM) that Linux can't control it.
>  (2) M7 in a separate Logical Machine that Linux can control it using
>      LMM protocol
>  (3) M7 runs in same Logical Machine as A55, so Linux can control it
>      using CPU protocol
>
> So extend the driver to using LMM and CPU protocol to manage the M7 core.
>  - Add IMX_RPROC_SM to indicate the remote core runs on a SoC that
>    has System Manager.
>  - Compare linux LM ID(got using scmi_imx_lmm_info) and M7 LM ID(got
>    from DTB), if same, use CPU protocol to start/stop. Otherwise, use
>    LMM protocol to start/stop.
>    Whether using CPU or LMM protocol to start/stop, the M7 status
>    detection could use CPU protocol to detect started or not. So
>    in imx_rproc_detect_mode, use scmi_imx_cpu_started to check the
>    status of M7.
>  - For above case 1 and 2, Use SCMI_IMX_LMM_POWER_ON to detect whether
>    the M7 LM is under control of A55 LM.
>
> Current setup relies on pre-Linux software(U-Boot) to do
> M7 TCM ECC initialization. In future, we could add the support in Linux
> to decouple U-Boot and Linux.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>

Re: [PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95

[Peng Fan]

Hi Daniel,

On Mon, Jun 16, 2025 at 04:07:02PM +0300, Daniel Baluta wrote:
>On Fri, Jun 6, 2025 at 4:57???AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>>
>> From: Peng Fan <peng.fan@nxp.com>
>>
>> i.MX95 has a System Manager(SM) core runs the System Control Management
>> Interface(SCMI) firmware. Vendor extenions are implemented in the
>> firmware, Logical Machine Management(LMM) protocol to manage
>> Logical Machines and CPU protocol to manage cores. The documentation
>> could be found in file drivers/firmware/arm_scmi/vendors/imx/imx95.rst.
>>
>> Add below to support i.MX95
>>  - compatible string for i.MX95 M7
>>  - fsl,lmm-id to indicate the LMM ID of M7 LM
>>  - fsl,cpu-id to indicate the CPU ID of M7
>>
>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>> ---
>>  .../bindings/remoteproc/fsl,imx-rproc.yaml         | 27 ++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
>> index 57d75acb0b5e52ca49d1361176fdebc18a0bf7a2..a3ffab60df52be6f1d7cf4846ca5ba1c40f03bde 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
>> +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
>> @@ -28,6 +28,7 @@ properties:
>>        - fsl,imx8qxp-cm4
>>        - fsl,imx8ulp-cm33
>>        - fsl,imx93-cm33
>> +      - fsl,imx95-cm7
>>
>>    clocks:
>>      maxItems: 1
>> @@ -68,6 +69,12 @@ properties:
>>        Indicate whether need to load the default firmware and start the remote
>>        processor automatically.
>>
>> +  fsl,cpu-id:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description:
>> +      This property is to specify the CPU ID of the remote processor
>> +      in SoC which supports System Manager
>> +
>>    fsl,entry-address:
>>      $ref: /schemas/types.yaml#/definitions/uint32
>>      description:
>> @@ -78,6 +85,12 @@ properties:
>>      description:
>>        Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
>>
>> +  fsl,lmm-id:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description:
>> +      This property is to specify the Logical Machine ID of the remote processor
>> +      in SoC which supports System Manager
>> +
>>    fsl,resource-id:
>>      $ref: /schemas/types.yaml#/definitions/uint32
>>      description:
>> @@ -114,6 +127,20 @@ allOf:
>>        properties:
>>          power-domains: false
>>
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: fsl,imx95-cm7
>> +    then:
>> +      required:
>> +        - fsl,lmm-id
>> +        - fsl,cpu-id
>> +    else:
>> +      properties:
>> +        fsl,lmm-id: false
>> +        fsl,cpu-id: false
>
>Hi Peng,
>
>Can you remind me why do we need the else branch here?
>
>I mean if the compatible is not fsl,imx95-cm7 then the properties
>fsl,lmm-id and fsl,cpu-id are not required and I think that's fine.

It is not required, but we should also block others wrongly add
the properties. Such as dt-schema should report error if user wrongly add
these properties in DTS.

DT maintainers may help comment more.

Thanks,
Peng

Re: [PATCH v2 0/3] remoteproc: imx_rproc: Support i.MX95

[Peng Fan]

On Fri, Jun 06, 2025 at 09:55:11AM +0800, Peng Fan (OSS) wrote:
>i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
>one Cortex-M7 core. The System Control Management Interface(SCMI)
>firmware runs on the M33 core. The i.MX95 SCMI firmware named System
>Manager(SM) includes vendor extension protocols, Logical Machine
>Management(LMM) protocol and CPU protocol and etc.

Ping..

Thanks,
Peng

>
>There are three cases for M7:
>(1) M7 in a separate Logical Machine(LM) that Linux couldn't control it.
>(2) M7 in a separate Logical Machine that Linux could control it using
>    LMM protocol
>(3) M7 runs in same Logical Machine as A55, so Linux could control it
>    using CPU protocol
>
>In patch 1, add fsl,lmm-id and fsl,cpu-id to indicate LM ID and CPU ID
>In patch 2, Use LMM and CPU protocol to manage M7. More info could be
>found in the patch commit log
>
>Current setup relies on pre-Linux software(U-Boot) to do
>M7 TCM ECC initialization. In future, we could add the support in Linux
>to decouple U-Boot and Linux.
>
>Patchset was tested with below boot images when the patchset based on next-20250526:
>imx-boot-variant-rpmsg-imx95-19x19-lpddr5-evk-sd.bin-flash_lpboot_sm_a55 (Use LMM protocol)
>imx-boot-variant-alt-imx95-19x19-lpddr5-evk-sd.bin-flash_alt (Use CPU protocol)
>imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_a55 (M7 not under A55 control)
>imx-boot-imx95-19x19-lpddr5-evk-sd.bin-flash_all (M7 not under A55 control)
>
>Patchset is re-based on next-20250603.
>
>Thanks for Daniel helping review the patchset before posting out to list.
>
>Signed-off-by: Peng Fan <peng.fan@nxp.com>
>---
>Changes in v2:
>- Typo fix in patch 2 commit message
>- Move the m7 address mapping array from patch 2 to patch 3
>- Add R-b from Daniel to patch 3
>- Link to v1: https://lore.kernel.org/r/20250604-imx95-rproc-1-v1-0-a6e5f512731c@nxp.com
>
>---
>Peng Fan (3):
>      dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95
>      remoteproc: imx_rproc: Add support for System Manager API
>      remoteproc: imx_rproc: Add support for i.MX95
>
> .../bindings/remoteproc/fsl,imx-rproc.yaml         |  27 ++++
> drivers/remoteproc/imx_rproc.c                     | 146 ++++++++++++++++++++-
> drivers/remoteproc/imx_rproc.h                     |   2 +
> 3 files changed, 173 insertions(+), 2 deletions(-)
>---
>base-commit: b79c044712e34fe49e7b85ffafd0bd460b5c4afa
>change-id: 20250525-imx95-rproc-1-20bb74ddc8af
>
>Best regards,
>-- 
>Peng Fan <peng.fan@nxp.com>
>

Re: [PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95

[Krzysztof Kozlowski]

On 06/06/2025 03:55, Peng Fan (OSS) wrote:
>    fsl,entry-address:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description:
> @@ -78,6 +85,12 @@ properties:
>      description:
>        Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
>  
> +  fsl,lmm-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      This property is to specify the Logical Machine ID of the remote processor
> +      in SoC which supports System Manager

As explained on IRC, none of above are suitable for DT, because these
are soc specific. Also, post upstream your DTS, so we will see complete
picture instead of guessing such things.

Best regards,
Krzysztof

RE: [PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95

[Peng Fan]

> Subject: Re: [PATCH v2 1/3] dt-bindings: remoteproc: fsl,imx-rproc:
> Add support for i.MX95
> 
> On 06/06/2025 03:55, Peng Fan (OSS) wrote:
> >    fsl,entry-address:
> >      $ref: /schemas/types.yaml#/definitions/uint32
> >      description:
> > @@ -78,6 +85,12 @@ properties:
> >      description:
> >        Phandle to IOMUXC GPR block which provide access to CM7
> CPUWAIT bit.
> >
> > +  fsl,lmm-id:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description:
> > +      This property is to specify the Logical Machine ID of the remote
> processor
> > +      in SoC which supports System Manager
> 
> As explained on IRC, none of above are suitable for DT, because these
> are soc specific. Also, post upstream your DTS, so we will see complete
> picture instead of guessing such things.

I see. I will include dts in V3.

For lmm-id, and cpu-id, after discussing with Frank, I will remove
them from binding patch.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof