From: Yixun Lan <dlan@gentoo.org>
To: Alex Elder <elder@riscstar.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org, heylenay@4d2.org,
inochiama@outlook.com, linux-clk@vger.kernel.org,
spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, Guodong Xu <guodong@riscstar.com>
Subject: Re: [PATCH] clk: spacemit: mark K1 pll1_d8 as critical
Date: Sun, 8 Jun 2025 00:24:53 +0000 [thread overview]
Message-ID: <20250608002453-GYA108101@gentoo> (raw)
In-Reply-To: <20250607202759.4180579-1-elder@riscstar.com>
Hi Alex,
On 15:27 Sat 07 Jun , Alex Elder wrote:
> The pll1_d8 clock is enabled by the boot loader, and is ultimately a
> parent for numerous clocks. Guodong Xu was recently testing DMA,
~~~~~~~~~this is still vague, numerous isn't equal to critical
> adding a reset property, and discovered that the needed reset was
> not yet ready during initial probe. It dropped its clock reference,
> which dropped parent references, and along the way it dropped the sole
> reference to pll1_d8 (from its prior clk_get()). Clock pll1_d8 got
> disabled, which resulted in a non-functioning system.
>
So, I'm trying to understand the problem, and would like to evaluate if
the "critical" flag is necessary..
It occurs to me, the DMA driver should request and enable clock first,
then request and issue a reset, it probably could be solved by proper
order? so what's the real problem here? is DMA or reset? dropped the
clock? or does driver fail to request a reset before clock is ready?
> Mark that clock critical so it doesn't get turned off in this case.
> We might be able to turn this flag off someday, but for now it
> resolves the problem Guodong encountered.
>
> Define a new macro CCU_FACTOR_GATE_DEFINE() to allow clock flags to
> be supplied for a CCU_FACTOR_GATE clock.
>
> Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
> Signed-off-by: Alex Elder <elder@riscstar.com>
> Tested-by: Guodong Xu <guodong@riscstar.com>
> ---
> drivers/clk/spacemit/ccu-k1.c | 3 ++-
> drivers/clk/spacemit/ccu_mix.h | 21 +++++++++++++--------
> 2 files changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/clk/spacemit/ccu-k1.c b/drivers/clk/spacemit/ccu-k1.c
> index cdde37a052353..df65009a07bb1 100644
> --- a/drivers/clk/spacemit/ccu-k1.c
> +++ b/drivers/clk/spacemit/ccu-k1.c
> @@ -170,7 +170,8 @@ CCU_FACTOR_GATE_DEFINE(pll1_d4, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(3), 4,
> CCU_FACTOR_GATE_DEFINE(pll1_d5, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(4), 5, 1);
> CCU_FACTOR_GATE_DEFINE(pll1_d6, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(5), 6, 1);
> CCU_FACTOR_GATE_DEFINE(pll1_d7, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(6), 7, 1);
> -CCU_FACTOR_GATE_DEFINE(pll1_d8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(7), 8, 1);
> +CCU_FACTOR_GATE_FLAGS_DEFINE(pll1_d8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(7), 8, 1,
> + CLK_IS_CRITICAL);
> CCU_FACTOR_GATE_DEFINE(pll1_d11_223p4, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(15), 11, 1);
> CCU_FACTOR_GATE_DEFINE(pll1_d13_189, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(16), 13, 1);
> CCU_FACTOR_GATE_DEFINE(pll1_d23_106p8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(20), 23, 1);
> diff --git a/drivers/clk/spacemit/ccu_mix.h b/drivers/clk/spacemit/ccu_mix.h
> index 51d19f5d6aacb..668c8139339e1 100644
> --- a/drivers/clk/spacemit/ccu_mix.h
> +++ b/drivers/clk/spacemit/ccu_mix.h
> @@ -101,16 +101,21 @@ static struct ccu_mix _name = { \
> } \
> }
>
> +#define CCU_FACTOR_GATE_FLAGS_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \
> + _mul, _flags) \
> +struct ccu_mix _name = { \
> + .gate = CCU_GATE_INIT(_mask_gate), \
> + .factor = CCU_FACTOR_INIT(_div, _mul), \
> + .common = { \
> + .reg_ctrl = _reg_ctrl, \
> + CCU_MIX_INITHW(_name, _parent, spacemit_ccu_factor_gate_ops, _flags) \
> + } \
> +}
> +
> #define CCU_FACTOR_GATE_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \
> _mul) \
> -static struct ccu_mix _name = { \
> - .gate = CCU_GATE_INIT(_mask_gate), \
> - .factor = CCU_FACTOR_INIT(_div, _mul), \
> - .common = { \
> - .reg_ctrl = _reg_ctrl, \
> - CCU_MIX_INITHW(_name, _parent, spacemit_ccu_factor_gate_ops, 0) \
> - } \
> -}
> + CCU_FACTOR_GATE_FLAGS_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \
> + _mul, 0)
>
> #define CCU_MUX_GATE_DEFINE(_name, _parents, _reg_ctrl, _shift, _width, \
> _mask_gate, _flags) \
> --
> 2.45.2
>
--
Yixun Lan (dlan)
next prev parent reply other threads:[~2025-06-08 0:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-07 20:27 [PATCH] clk: spacemit: mark K1 pll1_d8 as critical Alex Elder
2025-06-08 0:24 ` Yixun Lan [this message]
2025-06-08 2:46 ` Alex Elder
2025-06-08 4:46 ` Haylen Chu
2025-06-08 12:56 ` Yixun Lan
2025-06-08 18:31 ` Alex Elder
2025-06-09 4:21 ` Haylen Chu
2025-06-08 19:30 ` kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2025-06-09 20:08 Alex Elder
2025-06-09 20:14 ` Alex Elder
2025-06-10 2:24 ` Haylen Chu
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