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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45209ce1afasm122386435e9.10.2025.06.09.14.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jun 2025 14:19:15 -0700 (PDT) Date: Mon, 9 Jun 2025 22:19:14 +0100 From: David Laight To: Mateusz Guzik Cc: torvalds@linux-foundation.org, mingo@redhat.com, x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] x86: prevent gcc from emitting rep movsq/stosq for inlined ops Message-ID: <20250609221914.38ad6738@pumpkin> In-Reply-To: <20250605164733.737543-1-mjguzik@gmail.com> References: <20250605164733.737543-1-mjguzik@gmail.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 5 Jun 2025 18:47:33 +0200 Mateusz Guzik wrote: > gcc is over eager to use rep movsq/stosq (starts above 40 bytes), which > comes with a significant penalty on CPUs without the respective fast > short ops bits (FSRM/FSRS). > > Another point is that even uarchs with FSRM don't necessarily have FSRS (Ice > Lake and Sapphire Rapids don't). > > More importantly, rep movsq is not fast even if FSRM is present. Which architecture is that? I got exactly the same timings for 'rep movsb' and 'rep movsq' when I did some tests on Intel cpu going back to Ivy bridge. I do need to redo them though, I've worked out how to time them without using mfence/lfence and that should give a reasonable estimation of the setup cost. (I can measure the data-dependency of a single divide...) David