* [PATCH v5 1/3] dt-bindings: arm: rockchip: Add Radxa CM5 IO board
2025-06-17 22:11 [PATCH v5 0/3] Add Radxa CM5 module and IO board dts Joseph Kogut
@ 2025-06-17 22:11 ` Joseph Kogut
2025-06-17 22:12 ` [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 Joseph Kogut
` (2 subsequent siblings)
3 siblings, 0 replies; 11+ messages in thread
From: Joseph Kogut @ 2025-06-17 22:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel,
Joseph Kogut, Krzysztof Kozlowski
Add device tree binding for the Radxa CM5 IO board.
This board is based on the rk3588s.
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 650fb833d96ef67ea1bba33c0767777378a38fa7..64b0a0dfcf12a75af908ab723d5a4dd9bfba8167 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -840,6 +840,13 @@ properties:
- const: radxa,cm3
- const: rockchip,rk3566
+ - description: Radxa Compute Module 5 (CM5)
+ items:
+ - enum:
+ - radxa,cm5-io
+ - const: radxa,cm5
+ - const: rockchip,rk3588s
+
- description: Radxa CM3 Industrial
items:
- enum:
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5
2025-06-17 22:11 [PATCH v5 0/3] Add Radxa CM5 module and IO board dts Joseph Kogut
2025-06-17 22:11 ` [PATCH v5 1/3] dt-bindings: arm: rockchip: Add Radxa CM5 IO board Joseph Kogut
@ 2025-06-17 22:12 ` Joseph Kogut
2025-08-07 11:47 ` FUKAUMI Naoki
2025-08-07 13:26 ` FUKAUMI Naoki
2025-06-17 22:12 ` [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier Joseph Kogut
2025-09-03 8:28 ` [PATCH v5 0/3] Add Radxa CM5 module and IO board dts FUKAUMI Naoki
3 siblings, 2 replies; 11+ messages in thread
From: Joseph Kogut @ 2025-06-17 22:12 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel,
Joseph Kogut
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
proprietary connector.
Specification:
- Rockchip RK3588
- Up to 32 GB LPDDR4X
- Up to 128 GB eMMC
- 1x HDMI TX up to 8k@60 hz
- 1x eDP TX up to 4k@60 hz
- Gigabit Ethernet PHY
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
---
.../arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 +++++++++++++++++++++
1 file changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..6410ea5255dc783e5d24677853ccf1c78008e834
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 data sheet
+ * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ compatible = "radxa,cm5", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&pd_gpu {
+ domain-supply = <&vdd_gpu_s0>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5
2025-06-17 22:12 ` [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 Joseph Kogut
@ 2025-08-07 11:47 ` FUKAUMI Naoki
2025-08-07 13:26 ` FUKAUMI Naoki
1 sibling, 0 replies; 11+ messages in thread
From: FUKAUMI Naoki @ 2025-08-07 11:47 UTC (permalink / raw)
To: Joseph Kogut, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel
Hi Joseph,
First of all, thank you very much for your hard work!
On 6/18/25 07:12, Joseph Kogut wrote:
> Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
> proprietary connector.
>
> Specification:
> - Rockchip RK3588
> - Up to 32 GB LPDDR4X
> - Up to 128 GB eMMC
> - 1x HDMI TX up to 8k@60 hz
> - 1x eDP TX up to 4k@60 hz
> - Gigabit Ethernet PHY
>
> Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
> ---
> .../arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 +++++++++++++++++++++
> 1 file changed, 135 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..6410ea5255dc783e5d24677853ccf1c78008e834
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> @@ -0,0 +1,135 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
> + */
> +
> +/*
> + * CM5 data sheet
> + * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +/ {
> + compatible = "radxa,cm5", "rockchip,rk3588s";
> +
> + aliases {
> + mmc0 = &sdhci;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led_sys: led-0 {
> + color = <LED_COLOR_ID_BLUE>;
> + default-state = "on";
> + function = LED_FUNCTION_HEARTBEAT;
> + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b2 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_b3 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu_s0>;
> + status = "okay";
> +};
> +
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0m2_xfer>;
> + status = "okay";
> +
> + vdd_cpu_big0_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big0_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_big1_s0: regulator@43 {
> + compatible = "rockchip,rk8602";
> + reg = <0x43>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big1_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&mdio1 {
> + rgmii_phy1: phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> + };
> +};
> +
> +&pd_gpu {
> + domain-supply = <&vdd_gpu_s0>;
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + no-sdio;
> + no-sd;
> + non-removable;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
Please remove the last blank line.
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5
2025-06-17 22:12 ` [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 Joseph Kogut
2025-08-07 11:47 ` FUKAUMI Naoki
@ 2025-08-07 13:26 ` FUKAUMI Naoki
1 sibling, 0 replies; 11+ messages in thread
From: FUKAUMI Naoki @ 2025-08-07 13:26 UTC (permalink / raw)
To: Joseph Kogut, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel
Hi Joseph,
I overlooked a few things.
On 6/18/25 07:12, Joseph Kogut wrote:
> Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
> proprietary connector.
>
> Specification:
> - Rockchip RK3588
> - Up to 32 GB LPDDR4X
> - Up to 128 GB eMMC
> - 1x HDMI TX up to 8k@60 hz
> - 1x eDP TX up to 4k@60 hz
> - Gigabit Ethernet PHY
>
> Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
> ---
> .../arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 +++++++++++++++++++++
> 1 file changed, 135 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..6410ea5255dc783e5d24677853ccf1c78008e834
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> @@ -0,0 +1,135 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
> + */
> +
> +/*
> + * CM5 data sheet
> + * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +/ {
> + compatible = "radxa,cm5", "rockchip,rk3588s";
> +
> + aliases {
> + mmc0 = &sdhci;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led_sys: led-0 {
> + color = <LED_COLOR_ID_BLUE>;
> + default-state = "on";
> + function = LED_FUNCTION_HEARTBEAT;
> + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b2 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_b3 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu_s0>;
> + status = "okay";
> +};
> +
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0m2_xfer>;
> + status = "okay";
> +
> + vdd_cpu_big0_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big0_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
VCC_SYSIN.
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_big1_s0: regulator@43 {
> + compatible = "rockchip,rk8602";
> + reg = <0x43>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big1_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
VCC_SYSIN.
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&mdio1 {
> + rgmii_phy1: phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> + };
> +};
> +
> +&pd_gpu {
> + domain-supply = <&vdd_gpu_s0>;
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + no-sdio;
> + no-sd;
> + non-removable;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier
2025-06-17 22:11 [PATCH v5 0/3] Add Radxa CM5 module and IO board dts Joseph Kogut
2025-06-17 22:11 ` [PATCH v5 1/3] dt-bindings: arm: rockchip: Add Radxa CM5 IO board Joseph Kogut
2025-06-17 22:12 ` [PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 Joseph Kogut
@ 2025-06-17 22:12 ` Joseph Kogut
2025-06-18 1:59 ` Jimmy Hon
` (2 more replies)
2025-09-03 8:28 ` [PATCH v5 0/3] Add Radxa CM5 module and IO board dts FUKAUMI Naoki
3 siblings, 3 replies; 11+ messages in thread
From: Joseph Kogut @ 2025-06-17 22:12 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel,
Joseph Kogut
Specification:
- 1x HDMI
- 2x MIPI DSI
- 2x MIPI CSI
- 1x eDP
- 1x M.2 E key
- 1x USB 3.0 Host
- 1x USB 3.0 OTG
- 2x USB 2.0 Host
- Headphone jack w/ microphone
- Gigabit Ethernet w/ PoE
- microSD slot
- 40-pin expansion header
- 12V DC
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588s-radxa-cm5-io.dts | 486 +++++++++++++++++++++
2 files changed, 487 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 3e8771ef69ba1c1428117cc2ae29b84e13523e21..bc09420cacde4557c42935066e9f70bca1190f82 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-cm5-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts
new file mode 100644
index 0000000000000000000000000000000000000000..18e11a9c7f03770c9b39056ccc91ae03a9d191c5
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts
@@ -0,0 +1,486 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 IO board data sheet
+ * https://dl.radxa.com/cm5/v2200/radxa_cm5_io_v2200_schematic.pdf
+ */
+
+/dts-v1/;
+#include "rk3588s.dtsi"
+#include "rk3588s-radxa-cm5.dtsi"
+
+/ {
+ model = "Radxa Compute Module 5 (CM5) IO Board";
+ compatible = "radxa,cm5-io", "radxa,cm5", "rockchip,rk3588s";
+
+ aliases {
+ ethernet0 = &gmac1;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ vcc12v_dcin: regulator-12v0-vcc-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_sys: regulator-5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vbus5v0_typec: vbus5v0-typec {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus5v0_typec";
+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus5v0_typec_en>;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_pcie: regulator-3v3-vcc-pcie {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus
+ &gmac1_clkinout>;
+ status = "okay";
+};
+
+&hdmi0 {
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi0_sound {
+ status = "okay";
+};
+
+&hdptxphy0 {
+ status = "okay";
+};
+
+&i2c6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6m3_xfer>;
+ status = "okay";
+
+ fusb302: usb-typec@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc0_int>;
+ vbus-supply = <&vbus5v0_typec>;
+
+ connector {
+ compatible = "usb-c-connector";
+ data-role = "dual";
+ label = "USB-C";
+ power-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
+ op-sink-microwatt = <1000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_orientation_switch: endpoint {
+ remote-endpoint = <&usbdp_phy0_orientation_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_role_switch: endpoint {
+ remote-endpoint = <&usb_host0_xhci_role_switch>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ usbc0_dp_altmode_mux: endpoint {
+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&i2s5_8ch {
+ status = "okay";
+};
+
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ fusb302 {
+ vbus5v0_typec_en: vbus5v0-typec-en {
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usbc0_int: usbc0-int {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <200000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vdd2_ddr_s3>;
+ vcc14-supply = <&vdd2_ddr_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: dcdc-reg1 {
+ regulator-name = "vdd_gpu_s0";
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg2 {
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-name = "vdd2_ddr_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-name = "vdd_2v0_pldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-name = "vcc_3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+ };
+ };
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "otg";
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ usb_host0_xhci_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_switch>;
+ };
+ };
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_xhci {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ sbu1-dc-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_orientation_switch: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_orientation_switch>;
+ };
+
+ usbdp_phy0_dp_altmode_mux: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&usbc0_dp_altmode_mux>;
+ };
+ };
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier
2025-06-17 22:12 ` [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier Joseph Kogut
@ 2025-06-18 1:59 ` Jimmy Hon
2025-06-18 17:51 ` Joseph Kogut
2025-07-11 23:09 ` Dmitriy Filchenko
2025-08-07 13:20 ` FUKAUMI Naoki
2 siblings, 1 reply; 11+ messages in thread
From: Jimmy Hon @ 2025-06-18 1:59 UTC (permalink / raw)
To: Joseph Kogut
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Steve deRosier, devicetree, linux-rockchip, linux-kernel
On Tue, Jun 17, 2025 at 5:12 PM Joseph Kogut <joseph.kogut@gmail.com> wrote:
> +
> +&gmac1 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> + phy-mode = "rgmii-id";
> + phy-supply = <&vcc_3v3_s0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_miim
> + &gmac1_tx_bus2
> + &gmac1_rx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus
> + &gmac1_clkinout>;
> + status = "okay";
> +};
> +
Sorry, I meant only the status property should go to the board DTS.
The rest of the gmac1 definition makes sense to put in the SoM dtsi,
since the PHY is on the SoM (as defined in the mdio1 node). So all
the pins between the MAC and PHY will be the same.
Jimmy
>
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier
2025-06-18 1:59 ` Jimmy Hon
@ 2025-06-18 17:51 ` Joseph Kogut
0 siblings, 0 replies; 11+ messages in thread
From: Joseph Kogut @ 2025-06-18 17:51 UTC (permalink / raw)
To: Jimmy Hon
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Steve deRosier, devicetree, linux-rockchip, linux-kernel
On Tue, Jun 17, 2025 at 6:59 PM Jimmy Hon <honyuenkwun@gmail.com> wrote:
>
> On Tue, Jun 17, 2025 at 5:12 PM Joseph Kogut <joseph.kogut@gmail.com> wrote:
> > +
> > +&gmac1 {
> > + clock_in_out = "output";
> > + phy-handle = <&rgmii_phy1>;
> > + phy-mode = "rgmii-id";
> > + phy-supply = <&vcc_3v3_s0>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&gmac1_miim
> > + &gmac1_tx_bus2
> > + &gmac1_rx_bus2
> > + &gmac1_rgmii_clk
> > + &gmac1_rgmii_bus
> > + &gmac1_clkinout>;
> > + status = "okay";
> > +};
> > +
> Sorry, I meant only the status property should go to the board DTS.
> The rest of the gmac1 definition makes sense to put in the SoM dtsi,
> since the PHY is on the SoM (as defined in the mdio1 node). So all
> the pins between the MAC and PHY will be the same.
>
> Jimmy
>
Ah, thanks for the clarification. That's a small fixup, no worries.
Thanks for the feedback, I'll follow up.
Joseph
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier
2025-06-17 22:12 ` [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier Joseph Kogut
2025-06-18 1:59 ` Jimmy Hon
@ 2025-07-11 23:09 ` Dmitriy Filchenko
2025-08-07 13:20 ` FUKAUMI Naoki
2 siblings, 0 replies; 11+ messages in thread
From: Dmitriy Filchenko @ 2025-07-11 23:09 UTC (permalink / raw)
To: joseph.kogut
Cc: conor+dt, derosier, devicetree, heiko, honyuenkwun, krzk+dt,
linux-kernel, linux-rockchip, robh
Should `vdd_cpu_lit_s0` and some others be in the SoM device tree instead of the IO board? I see it on page 18 of the schematic https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
Additionally, I am getting the following during boot:
```
[ 38.190604] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier spi2.0 for /power-management@fd8d8000/power-controller/power-domain@12
```
The device is an RK3588s CM5 on the IO board powered through the barrel jack.
--
Dmitriy
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier
2025-06-17 22:12 ` [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier Joseph Kogut
2025-06-18 1:59 ` Jimmy Hon
2025-07-11 23:09 ` Dmitriy Filchenko
@ 2025-08-07 13:20 ` FUKAUMI Naoki
2 siblings, 0 replies; 11+ messages in thread
From: FUKAUMI Naoki @ 2025-08-07 13:20 UTC (permalink / raw)
To: Joseph Kogut, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel
Hi Joseph,
On 6/18/25 07:12, Joseph Kogut wrote:
> Specification:
> - 1x HDMI
> - 2x MIPI DSI
> - 2x MIPI CSI
> - 1x eDP
> - 1x M.2 E key
> - 1x USB 3.0 Host
> - 1x USB 3.0 OTG
> - 2x USB 2.0 Host
> - Headphone jack w/ microphone
> - Gigabit Ethernet w/ PoE
> - microSD slot
> - 40-pin expansion header
> - 12V DC
>
> Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3588s-radxa-cm5-io.dts | 486 +++++++++++++++++++++
> 2 files changed, 487 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index 3e8771ef69ba1c1428117cc2ae29b84e13523e21..bc09420cacde4557c42935066e9f70bca1190f82 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-cm5-io.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts
> new file mode 100644
> index 0000000000000000000000000000000000000000..18e11a9c7f03770c9b39056ccc91ae03a9d191c5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts
> @@ -0,0 +1,486 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
> + */
> +
> +/*
> + * CM5 IO board data sheet
> + * https://dl.radxa.com/cm5/v2200/radxa_cm5_io_v2200_schematic.pdf
The link from
https://radxa.com/products/io-board/cm5-io-board#downloads
is
https://dl.radxa.com/cm5/io_board_v2200/radxa_cm5_io_board_v2200_schematic.pdf.
(I think it's a mistake that the IO board schematic is under /v2200/,
sorry!)
> + */
> +
> +/dts-v1/;
> +#include "rk3588s.dtsi"
> +#include "rk3588s-radxa-cm5.dtsi"
> +
> +/ {
> + model = "Radxa Compute Module 5 (CM5) IO Board";
> + compatible = "radxa,cm5-io", "radxa,cm5", "rockchip,rk3588s";
> +
> + aliases {
> + ethernet0 = &gmac1;
> + mmc1 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + hdmi-con {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi0_out_con>;
> + };
> + };
> + };
> +
> + vcc12v_dcin: regulator-12v0-vcc-dcin {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + vcc5v0_host: vcc5v0-host-regulator {
Node name should be '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'.
Please see Documentation/devicetree/bindings/regulator/fixed-regulator.yaml.
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_host";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_host_en>;
> + vin-supply = <&vcc5v0_sys>;
> + };
According to the schematic, the name of the regulator controlled by
GPIO1_A0 is VCC5V0_USB1, its power supply is VCC5V0_USB, and its power
supply is VCC12V_DCIN.
Also, the name of GPIO1_A0 is USB_HOST_PWREN_H.
> + vcc5v0_sys: regulator-5v0-sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vbus5v0_typec: vbus5v0-typec {
Node name should be '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'.
> + compatible = "regulator-fixed";
> + regulator-name = "vbus5v0_typec";
> + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vbus5v0_typec_en>;
The name of GPIO0_D5 is TYPEC5V_PWREN_H.
> + enable-active-high;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc3v3_pcie: regulator-3v3-vcc-pcie {
Is it VCC3V3_WF?
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_pcie2x1l0";
I think the regulator-name should be aligned with the node label.
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + regulator-boot-on;
> + regulator-always-on;
> + gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <50000>;
> + vin-supply = <&vcc5v0_sys>;
pinctrl-* are missing.
> + };
> +
> + vcc_3v3_s0: pldo-reg4 {
Node name should be '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'.
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
Are the following properties required?
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
The power supply for VCC_3V3_S0 is VCC_3V3_S3.
> + };
> +};
> +
> +&combphy0_ps {
> + status = "okay";
> +};
> +
> +&combphy2_psu {
> + status = "okay";
> +};
> +
> +&gmac1 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> + phy-mode = "rgmii-id";
> + phy-supply = <&vcc_3v3_s0>;
VCC_3V3_S3?
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_miim
> + &gmac1_tx_bus2
> + &gmac1_rx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus
> + &gmac1_clkinout>;
> + status = "okay";
> +};
> +
> +&hdmi0 {
> + status = "okay";
> +};
> +
> +&hdmi0_in {
> + hdmi0_in_vp0: endpoint {
> + remote-endpoint = <&vp0_out_hdmi0>;
> + };
> +};
> +
> +&hdmi0_out {
> + hdmi0_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
> +
> +&hdmi0_sound {
> + status = "okay";
> +};
> +
> +&hdptxphy0 {
> + status = "okay";
> +};
> +
> +&i2c6 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c6m3_xfer>;
> + status = "okay";
> +
> + fusb302: usb-typec@22 {
> + compatible = "fcs,fusb302";
> + reg = <0x22>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc0_int>;
CC_INT0_L?
> + vbus-supply = <&vbus5v0_typec>;
> +
> + connector {
> + compatible = "usb-c-connector";
> + data-role = "dual";
> + label = "USB-C";
> + power-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
> + op-sink-microwatt = <1000000>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + usbc0_orientation_switch: endpoint {
> + remote-endpoint = <&usbdp_phy0_orientation_switch>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + usbc0_role_switch: endpoint {
> + remote-endpoint = <&usb_host0_xhci_role_switch>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + usbc0_dp_altmode_mux: endpoint {
> + remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> +&i2s5_8ch {
> + status = "okay";
> +};
> +
> +&pcie2x1l2 {
> + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + fusb302 {
> + vbus5v0_typec_en: vbus5v0-typec-en {
> + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + usbc0_int: usbc0-int {
> + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb {
> + vcc5v0_host_en: vcc5v0-host-en {
> + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + disable-wp;
> + max-frequency = <200000000>;
> + no-sdio;
> + no-mmc;
> + sd-uhs-sdr104;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
> + vmmc-supply = <&vcc_3v3_s3>;
> + vqmmc-supply = <&vccio_sd_s0>;
> + status = "okay";
> +};
> +
> +&spi2 {
> + assigned-clocks = <&cru CLK_SPI2>;
> + assigned-clock-rates = <200000000>;
> + num-cs = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
> + status = "okay";
> +
> + pmic@0 {
The PMIC is on the CM5 board, not the IO board.
> + compatible = "rockchip,rk806";
> + reg = <0x0>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> + spi-max-frequency = <1000000>;
> + system-power-controller;
> +
> + vcc1-supply = <&vcc5v0_sys>;
> + vcc2-supply = <&vcc5v0_sys>;
> + vcc3-supply = <&vcc5v0_sys>;
> + vcc4-supply = <&vcc5v0_sys>;
> + vcc5-supply = <&vcc5v0_sys>;
> + vcc6-supply = <&vcc5v0_sys>;
> + vcc7-supply = <&vcc5v0_sys>;
> + vcc8-supply = <&vcc5v0_sys>;
> + vcc9-supply = <&vcc5v0_sys>;
> + vcc10-supply = <&vcc5v0_sys>;
These are supplied by VCC_SYSIN, which is supplied by VCC5V0_SYS.
> + vcc11-supply = <&vcc_2v0_pldo_s3>;
> + vcc12-supply = <&vcc5v0_sys>;
VCC_SYSIN.
> + vcc13-supply = <&vdd2_ddr_s3>;
> + vcc14-supply = <&vdd2_ddr_s3>;
These are supplied by VCC_1V1_NLDO_S3, which is supplied by VCC_SYSIN.
> + vcca-supply = <&vcc5v0_sys>;
VCC_SYSIN.
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + rk806_dvs1_null: dvs1-null-pins {
> + pins = "gpio_pwrctrl1";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs2_null: dvs2-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs3_null: dvs3-null-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun0";
> + };
> +
> + regulators {
> + vdd_gpu_s0: dcdc-reg1 {
> + regulator-name = "vdd_gpu_s0";
> + regulator-boot-on;
> + regulator-enable-ramp-delay = <400>;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_lit_s0: dcdc-reg2 {
> + regulator-name = "vdd_cpu_lit_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
I think dcdc-reg3, dcdc-reg4 and dcdc-reg5 should also be defined.
> + vccio_sd_s0: pldo-reg5 {
Please move pldo-* further down.
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vccio_sd_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd2_ddr_s3: dcdc-reg6 {
> + regulator-name = "vdd2_ddr_s3";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_2v0_pldo_s3: dcdc-reg7 {
> + regulator-name = "vdd_2v0_pldo_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <2000000>;
> + regulator-max-microvolt = <2000000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <2000000>;
> + };
> + };
> +
> + vcc_3v3_s3: dcdc-reg8 {
> + regulator-name = "vcc_3v3_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
I think dcdc-reg9, dcdc-reg10, pldo-* and nldo-* should also be defined.
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
> + };
> + };
> +};
> +
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> +&u2phy2 {
> + status = "okay";
> +};
> +
> +&u2phy2_host {
> + status = "okay";
> +};
> +
> +&u2phy3 {
> + status = "okay";
> +};
> +
> +&u2phy3_host {
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2m0_xfer>;
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + dr_mode = "otg";
> + usb-role-switch;
> + status = "okay";
> +
> + port {
> + usb_host0_xhci_role_switch: endpoint {
> + remote-endpoint = <&usbc0_role_switch>;
> + };
> + };
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> +
> +&usb_host2_xhci {
> + status = "okay";
> +};
> +
> +&usbdp_phy0 {
> + mode-switch;
> + orientation-switch;
> + sbu1-dc-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
> + sbu2-dc-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + usbdp_phy0_orientation_switch: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&usbc0_orientation_switch>;
> + };
> +
> + usbdp_phy0_dp_altmode_mux: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&usbc0_dp_altmode_mux>;
> + };
> + };
> +};
> +
> +&vop {
> + status = "okay";
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0 {
> + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
> + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
> + remote-endpoint = <&hdmi0_in_vp0>;
> + };
> +};
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 0/3] Add Radxa CM5 module and IO board dts
2025-06-17 22:11 [PATCH v5 0/3] Add Radxa CM5 module and IO board dts Joseph Kogut
` (2 preceding siblings ...)
2025-06-17 22:12 ` [PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier Joseph Kogut
@ 2025-09-03 8:28 ` FUKAUMI Naoki
3 siblings, 0 replies; 11+ messages in thread
From: FUKAUMI Naoki @ 2025-09-03 8:28 UTC (permalink / raw)
To: Joseph Kogut, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Jimmy Hon
Cc: Steve deRosier, devicetree, linux-rockchip, linux-kernel,
Krzysztof Kozlowski
Hi Joseph,
I'm thinking of continuing your work, so if you've already done
something, please let me know.
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
On 6/18/25 07:11, Joseph Kogut wrote:
> This patch series adds initial device tree support for the Radxa CM5 SoM
> and accompanying IO board.
>
> V4 -> V5:
> Patch (2/3), per Jimmy:
> - Alias eMMC to mmc0
> - Remove unused sdio alias
> - Move gmac, hdmi0 nodes to carrier board dts
>
> Patch (3/3), per Jimmy:
> - Enable hdmi0_sound and i2s5_8ch
> - Remove redundant enablement of sdhci
> - Enable usb_host2_xhci
>
> - Tested HDMI audio
>
> V3 -> V4:
> - Fixed XHCI initialization bug by changing try-power-role from source
> to sink
>
> V2 -> V3:
> - Addressed YAML syntax error in dt binding (per Rob)
> - Fixed whitespace issue in dts reported by checkpatch.pl
> - Split base SoM and carrier board into separate patches
> - Added further details about the SoM and carrier to the commit
> messages
>
> V1 -> V2:
> - Added copyright header and data sheet links
> - Removed non-existent property
> - Sorted alphabetically
> - Removed errant whitespace
> - Moved status to the end of each node
> - Removed pinctrl-names property from leds (indicated by CHECK_DTBS)
> - Removed delays from gmac with internal delay
>
> - Link to v4: https://lore.kernel.org/r/20250605-rk3588s-cm5-io-dts-upstream-v4-0-8445db5ca6b0@gmail.com
>
> Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
> ---
> Joseph Kogut (3):
> dt-bindings: arm: rockchip: Add Radxa CM5 IO board
> arm64: dts: rockchip: Add rk3588 based Radxa CM5
> arm64: dts: rockchip: Add support for CM5 IO carrier
>
> .../devicetree/bindings/arm/rockchip.yaml | 7 +
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3588s-radxa-cm5-io.dts | 486 +++++++++++++++++++++
> .../arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 ++++++
> 4 files changed, 629 insertions(+)
> ---
> base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8
> change-id: 20250605-rk3588s-cm5-io-dts-upstream-f4d1e853977e
>
> Best regards,
^ permalink raw reply [flat|nested] 11+ messages in thread