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Tsirkin" To: Jason Gunthorpe Cc: Demi Marie Obenour , Jason Wang , Xuan Zhuo , Eugenio =?iso-8859-1?Q?P=E9rez?= , "Rafael J. Wysocki" , Len Brown , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Joerg Roedel , Will Deacon , Robin Murphy , Alyssa Ross , virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux.dev, x86@kernel.org, Spectrum OS Development Subject: Re: Virtio-IOMMU interrupt remapping design Message-ID: <20250617160103-mutt-send-email-mst@kernel.org> References: <> <20250616132031.GB1354058@ziepe.ca> <20250617154331-mutt-send-email-mst@kernel.org> <20250617195720.GI1376515@ziepe.ca> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250617195720.GI1376515@ziepe.ca> On Tue, Jun 17, 2025 at 04:57:20PM -0300, Jason Gunthorpe wrote: > On Tue, Jun 17, 2025 at 03:44:20PM -0400, Michael S. Tsirkin wrote: > > On Mon, Jun 16, 2025 at 10:20:31AM -0300, Jason Gunthorpe wrote: > > > On Sun, Jun 15, 2025 at 02:47:15PM -0400, Demi Marie Obenour wrote: > > > > > > > Is a paravirtualized IOMMU with interrupt remapping something that makes > > > > sense? > > > > > > IMHO linking interrupt remapping to the iommu is a poor design, > > > interrupt routing belongs in the irq subsystem, not in the iommu. > > > > > > The fact AMD and Intel both coupled their interrupt routing to their > > > iommu hardware is just a weird design decision. ARM didn't do this, > > > for instance. > > > > why does it matter in which device it resides? > > It would cleanup the boot process if the IRQ components were available > at the same time as the IRQ drivers instead of much later when the > iommu gets plugged in. > > > Way I see it, there is little reason to remap interrupts without > > also using an iommu, so why not a single device. what did I miss? > > Remapping interrupts can be understood to be virtualizing the MSI > addr/data pair space so that the CPU controls where the interrupt goes > though its internal tables not the device through the addr/data. > > On x86 you also need to use remapping to exceed the max CPU count that > can be encoded in the MSI, no iommu required to need this. More of an x86 quirk though, isn't it? > There is also some stuff related to IMS that could get improved here. > > You don't need an iommu to enjoy those benefits. > > Jason