[PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses for K1

[PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses for K1

[Vivian Wang]

The SpacemiT K1 has various static translations of DMA accesses. This
series adds all the DMA translation bus nodes and also moves existing
nodes as necessary.

According to SpacemiT DT maintainer Yixun Lan [1], it's preferable from
a SoC DT maintainer's perspective to have this done at once instead of
spreading these changes into various driver series. Once this is merged,
life will be easier for future users of the buses.

This series contains no bindings changes.

Patch 3 moves the eMMC node added in [1].

These patches can also be pulled from:

https://github.com/dramforever/linux/tree/k1/dma-ranges/v1

[1]: https://lore.kernel.org/r/20250623070147-GYA193822@gentoo
[2]: https://lore.kernel.org/r/20250523-22-k1-sdhci-v1-1-6e0adddf7494@gentoo.org

---
Changes since RFC
- Reworded patch messages
- Also moved existing nodes under relevant buses
- Link to RFC: https://lore.kernel.org/r/20250617-k1-dma-buses-rfc-wip-v1-1-c8ec192fbf58@iscas.ac.cn

---
Vivian Wang (3):
      riscv: dts: spacemit: Add DMA translation buses for K1
      riscv: dts: spacemit: Move UARTs under dma-bus for K1
      riscv: dts: spacemit: Move eMMC under storage-bus for K1

 arch/riscv/boot/dts/spacemit/k1.dtsi | 314 +++++++++++++++++++++--------------
 1 file changed, 189 insertions(+), 125 deletions(-)
---
base-commit: d9946fe286439c2aeaa7953b8c316efe5b83d515
change-id: 20250616-k1-dma-buses-rfc-wip-3be7a01f47c8
prerequisite-message-id: <20250523-22-k1-sdhci-v1-1-6e0adddf7494@gentoo.org>
prerequisite-patch-id: 53fc23b06e26ab0ebb2c52ee09f4b2cffab889e2

Best regards,
-- 
Vivian "dramforever" Wang

[PATCH 1/3] riscv: dts: spacemit: Add DMA translation buses for K1

[Vivian Wang]

The SpacemiT K1 has various static translations of DMA accesses. Add
these as simple-bus nodes with dma-ranges. Devices actually using these
translations will be added to or moved inside the bus nodes in later
patches.

The bus names are assigned according to consensus with SpacemiT [1].

Link: https://lore.kernel.org/r/CAH1PCMaC+imcMZCFYtRdmH6ge=dPgnANn_GqVfsGRS=+YhyJCw@mail.gmail.com [1]
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 14097f1f6f447bd33ff3aaa07382d27ca8e59a48..99c76997b367f733c9dda2c30dd85817294ef9b7 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -571,5 +571,58 @@ sec_uart1: serial@f0612000 {
 			reg-io-width = <4>;
 			status = "reserved"; /* for TEE usage */
 		};
+
+		camera-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
+				     <0x0 0x80000000 0x1 0x00000000 0x1 0x80000000>;
+		};
+
+		dma-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
+				     <0x1 0x00000000 0x1 0x80000000 0x3 0x00000000>;
+		};
+
+		multimedia-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
+				     <0x0 0x80000000 0x1 0x00000000 0x3 0x80000000>;
+		};
+
+		network-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
+				     <0x0 0x80000000 0x1 0x00000000 0x0 0x80000000>;
+		};
+
+		pcie-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
+				     <0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000>;
+		};
+
+		storage-bus {
+			compatible = "simple-bus";
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+		};
 	};
 };

-- 
2.49.0

[PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1

[Vivian Wang]

UART devices in Spacemit K1 use dma-bus DMA translations. Move these
nodes under dma-bus to reflect this fact.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 246 ++++++++++++++++++-----------------
 1 file changed, 128 insertions(+), 118 deletions(-)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 99c76997b367f733c9dda2c30dd85817294ef9b7..0d41694699851e672a833601b62c2b2ad3daae79 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -357,114 +357,6 @@ syscon_apbc: system-controller@d4015000 {
 			#reset-cells = <1>;
 		};
 
-		uart0: serial@d4017000 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017000 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART0>,
-				 <&syscon_apbc CLK_UART0_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <42>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart2: serial@d4017100 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017100 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART2>,
-				 <&syscon_apbc CLK_UART2_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <44>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart3: serial@d4017200 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017200 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART3>,
-				 <&syscon_apbc CLK_UART3_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <45>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart4: serial@d4017300 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017300 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART4>,
-				 <&syscon_apbc CLK_UART4_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <46>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart5: serial@d4017400 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017400 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART5>,
-				 <&syscon_apbc CLK_UART5_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <47>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart6: serial@d4017500 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017500 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART6>,
-				 <&syscon_apbc CLK_UART6_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <48>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart7: serial@d4017600 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017600 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART7>,
-				 <&syscon_apbc CLK_UART7_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <49>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart8: serial@d4017700 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017700 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART8>,
-				 <&syscon_apbc CLK_UART8_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <50>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart9: serial@d4017800 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xd4017800 0x0 0x100>;
-			clocks = <&syscon_apbc CLK_UART9>,
-				 <&syscon_apbc CLK_UART9_BUS>;
-			clock-names = "core", "bus";
-			interrupts = <51>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
 		gpio: gpio@d4019000 {
 			compatible = "spacemit,k1-gpio";
 			reg = <0x0 0xd4019000 0x0 0x100>;
@@ -562,16 +454,6 @@ clint: timer@e4000000 {
 					      <&cpu7_intc 3>, <&cpu7_intc 7>;
 		};
 
-		sec_uart1: serial@f0612000 {
-			compatible = "spacemit,k1-uart", "intel,xscale-uart";
-			reg = <0x0 0xf0612000 0x0 0x100>;
-			interrupts = <43>;
-			clock-frequency = <14857000>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "reserved"; /* for TEE usage */
-		};
-
 		camera-bus {
 			compatible = "simple-bus";
 			ranges;
@@ -588,6 +470,134 @@ dma-bus {
 			#size-cells = <2>;
 			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
 				     <0x1 0x00000000 0x1 0x80000000 0x3 0x00000000>;
+
+			uart0: serial@d4017000 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017000 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART0>,
+					 <&syscon_apbc CLK_UART0_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <42>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart2: serial@d4017100 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017100 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART2>,
+					 <&syscon_apbc CLK_UART2_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <44>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart3: serial@d4017200 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017200 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART3>,
+					 <&syscon_apbc CLK_UART3_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <45>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart4: serial@d4017300 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017300 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART4>,
+					 <&syscon_apbc CLK_UART4_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <46>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart5: serial@d4017400 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017400 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART5>,
+					 <&syscon_apbc CLK_UART5_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <47>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart6: serial@d4017500 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017500 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART6>,
+					 <&syscon_apbc CLK_UART6_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <48>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart7: serial@d4017600 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017600 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART7>,
+					 <&syscon_apbc CLK_UART7_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <49>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart8: serial@d4017700 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017700 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART8>,
+					 <&syscon_apbc CLK_UART8_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <50>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			uart9: serial@d4017800 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xd4017800 0x0 0x100>;
+				clocks = <&syscon_apbc CLK_UART9>,
+					 <&syscon_apbc CLK_UART9_BUS>;
+				clock-names = "core", "bus";
+				interrupts = <51>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "disabled";
+			};
+
+			sec_uart1: serial@f0612000 {
+				compatible = "spacemit,k1-uart",
+					     "intel,xscale-uart";
+				reg = <0x0 0xf0612000 0x0 0x100>;
+				interrupts = <43>;
+				clock-frequency = <14857000>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				status = "reserved"; /* for TEE usage */
+			};
 		};
 
 		multimedia-bus {

-- 
2.49.0

[PATCH 3/3] riscv: dts: spacemit: Move eMMC under storage-bus for K1

[Vivian Wang]

SDHCI devices in Spacemit K1 use storage-bus translations. Move the node
emmc under storage-bus to reflect this fact.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 0d41694699851e672a833601b62c2b2ad3daae79..2d40360994d87edfbdaefc364ae706712022ba09 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -403,15 +403,6 @@ pll: clock-controller@d4090000 {
 			#clock-cells = <1>;
 		};
 
-		emmc: mmc@d4281000 {
-			compatible = "spacemit,k1-sdhci";
-			reg = <0x0 0xd4281000 0x0 0x200>;
-			clocks = <&syscon_apmu CLK_SDH_AXI>, <&syscon_apmu CLK_SDH2>;
-			clock-names = "core", "io";
-			interrupts = <101>;
-			status = "disabled";
-		};
-
 		syscon_apmu: system-controller@d4282800 {
 			compatible = "spacemit,k1-syscon-apmu";
 			reg = <0x0 0xd4282800 0x0 0x400>;
@@ -633,6 +624,16 @@ storage-bus {
 			#address-cells = <2>;
 			#size-cells = <2>;
 			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+
+			emmc: mmc@d4281000 {
+				compatible = "spacemit,k1-sdhci";
+				reg = <0x0 0xd4281000 0x0 0x200>;
+				clocks = <&syscon_apmu CLK_SDH_AXI>,
+					 <&syscon_apmu CLK_SDH2>;
+				clock-names = "core", "io";
+				interrupts = <101>;
+				status = "disabled";
+			};
 		};
 	};
 };

-- 
2.49.0

Re: [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1

[Guodong Xu]

On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>
> UART devices in Spacemit K1 use dma-bus DMA translations. Move these
> nodes under dma-bus to reflect this fact.
>
> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi | 246 ++++++++++++++++++-----------------
>  1 file changed, 128 insertions(+), 118 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 99c76997b367f733c9dda2c30dd85817294ef9b7..0d41694699851e672a833601b62c2b2ad3daae79 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -357,114 +357,6 @@ syscon_apbc: system-controller@d4015000 {
>                         #reset-cells = <1>;
>                 };
>
> -               uart0: serial@d4017000 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017000 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART0>,
> -                                <&syscon_apbc CLK_UART0_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <42>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart2: serial@d4017100 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017100 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART2>,
> -                                <&syscon_apbc CLK_UART2_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <44>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart3: serial@d4017200 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017200 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART3>,
> -                                <&syscon_apbc CLK_UART3_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <45>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart4: serial@d4017300 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017300 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART4>,
> -                                <&syscon_apbc CLK_UART4_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <46>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart5: serial@d4017400 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017400 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART5>,
> -                                <&syscon_apbc CLK_UART5_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <47>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart6: serial@d4017500 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017500 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART6>,
> -                                <&syscon_apbc CLK_UART6_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <48>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart7: serial@d4017600 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017600 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART7>,
> -                                <&syscon_apbc CLK_UART7_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <49>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart8: serial@d4017700 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017700 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART8>,
> -                                <&syscon_apbc CLK_UART8_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <50>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
> -               uart9: serial@d4017800 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xd4017800 0x0 0x100>;
> -                       clocks = <&syscon_apbc CLK_UART9>,
> -                                <&syscon_apbc CLK_UART9_BUS>;
> -                       clock-names = "core", "bus";
> -                       interrupts = <51>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "disabled";
> -               };
> -
>                 gpio: gpio@d4019000 {
>                         compatible = "spacemit,k1-gpio";
>                         reg = <0x0 0xd4019000 0x0 0x100>;
> @@ -562,16 +454,6 @@ clint: timer@e4000000 {
>                                               <&cpu7_intc 3>, <&cpu7_intc 7>;
>                 };
>
> -               sec_uart1: serial@f0612000 {
> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> -                       reg = <0x0 0xf0612000 0x0 0x100>;
> -                       interrupts = <43>;
> -                       clock-frequency = <14857000>;
> -                       reg-shift = <2>;
> -                       reg-io-width = <4>;
> -                       status = "reserved"; /* for TEE usage */
> -               };
> -

Are you sure sec_uart1 should be placed under the dma_bus? Please double
check. If sec_uart1 and other peripherals supported by the secure DMA
(base address: 0xF0600000) share the same address mapping as dma_bus, and
if they can be accessed by the linux kernel in some cases (as saying
'reserved'), then that makes sense. If not, better not move them.

--
Guodong

Re: [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1

[Vivian Wang]

On 6/24/25 20:21, Guodong Xu wrote:
> On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>> UART devices in Spacemit K1 use dma-bus DMA translations. Move these
>> nodes under dma-bus to reflect this fact.
...
>>
>> -               sec_uart1: serial@f0612000 {
>> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
>> -                       reg = <0x0 0xf0612000 0x0 0x100>;
>> -                       interrupts = <43>;
>> -                       clock-frequency = <14857000>;
>> -                       reg-shift = <2>;
>> -                       reg-io-width = <4>;
>> -                       status = "reserved"; /* for TEE usage */
>> -               };
>> -
> Are you sure sec_uart1 should be placed under the dma_bus? Please double
> check. If sec_uart1 and other peripherals supported by the secure DMA
> (base address: 0xF0600000) share the same address mapping as dma_bus, and
> if they can be accessed by the linux kernel in some cases (as saying
> 'reserved'), then that makes sense. If not, better not move them.

Bianbu's DT from SpacemiT [1] shows sec_uart1 using dram_range4, and it 
made sense to me. However just to be sure I will ask SpacemiT for 
confirmation.

Vivian "dramforever" Wang

[1]: https://gitee.com/bianbu-linux/linux-6.6/blob/k1-bl-v2.2.y/arch/riscv/boot/dts/spacemit/k1-x.dtsi

> --
> Guodong

Re: [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1

[Vivian Wang]

On 6/24/25 20:21, Guodong Xu wrote:
> On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>> UART devices in Spacemit K1 use dma-bus DMA translations. Move these
>> nodes under dma-bus to reflect this fact.
...
>>
>> -               sec_uart1: serial@f0612000 {
>> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
>> -                       reg = <0x0 0xf0612000 0x0 0x100>;
>> -                       interrupts = <43>;
>> -                       clock-frequency = <14857000>;
>> -                       reg-shift = <2>;
>> -                       reg-io-width = <4>;
>> -                       status = "reserved"; /* for TEE usage */
>> -               };
>> -
> Are you sure sec_uart1 should be placed under the dma_bus? Please double
> check. If sec_uart1 and other peripherals supported by the secure DMA
> (base address: 0xF0600000) share the same address mapping as dma_bus, and
> if they can be accessed by the linux kernel in some cases (as saying
> 'reserved'), then that makes sense. If not, better not move them.

Hi Guodong,

I have confirmed with SpacemiT that sec_uart1 uses dram_range4, a.k.a.
dma-bus, which is same as the rest of the UARTs.

Also, sec_uart1 is usable in e.g. Linux, but only if no TEE is in use.
Using status = "reserved" is the safe choice here. Platforms that do not
run a TEE (or anything similar that would disable access to the
0xf000_0000 to 0xffff_ffff range) and wishing to enable use of sec_uart1
can change the status to "okay".

Vivian "dramforever" Wang

Re: [PATCH 1/3] riscv: dts: spacemit: Add DMA translation buses for K1

[Guodong Xu]

On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>
> The SpacemiT K1 has various static translations of DMA accesses. Add
> these as simple-bus nodes with dma-ranges. Devices actually using these
> translations will be added to or moved inside the bus nodes in later
> patches.
>
> The bus names are assigned according to consensus with SpacemiT [1].
>
> Link: https://lore.kernel.org/r/CAH1PCMaC+imcMZCFYtRdmH6ge=dPgnANn_GqVfsGRS=+YhyJCw@mail.gmail.com [1]
> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi | 53 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 14097f1f6f447bd33ff3aaa07382d27ca8e59a48..99c76997b367f733c9dda2c30dd85817294ef9b7 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -571,5 +571,58 @@ sec_uart1: serial@f0612000 {
>                         reg-io-width = <4>;
>                         status = "reserved"; /* for TEE usage */
>                 };
> +
> +               camera-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
> +                                    <0x0 0x80000000 0x1 0x00000000 0x1 0x80000000>;
> +               };
> +
> +               dma-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
> +                                    <0x1 0x00000000 0x1 0x80000000 0x3 0x00000000>;
> +               };
> +
> +               multimedia-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
> +                                    <0x0 0x80000000 0x1 0x00000000 0x3 0x80000000>;
> +               };
> +
> +               network-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
> +                                    <0x0 0x80000000 0x1 0x00000000 0x0 0x80000000>;
> +               };
> +
> +               pcie-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
> +                                    <0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000>;
> +               };
> +
> +               storage-bus {
> +                       compatible = "simple-bus";
> +                       ranges;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
> +               };

This looks good to me.

Reviewed-by: Guodong Xu <guodong@riscstar.com>

>         };
>  };
>
> --
> 2.49.0
>

Re: [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1

[Guodong Xu]

On Wed, Jun 25, 2025 at 11:21 AM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>
> On 6/24/25 20:21, Guodong Xu wrote:
> > On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
> >> UART devices in Spacemit K1 use dma-bus DMA translations. Move these
> >> nodes under dma-bus to reflect this fact.
> ...
> >>
> >> -               sec_uart1: serial@f0612000 {
> >> -                       compatible = "spacemit,k1-uart", "intel,xscale-uart";
> >> -                       reg = <0x0 0xf0612000 0x0 0x100>;
> >> -                       interrupts = <43>;
> >> -                       clock-frequency = <14857000>;
> >> -                       reg-shift = <2>;
> >> -                       reg-io-width = <4>;
> >> -                       status = "reserved"; /* for TEE usage */
> >> -               };
> >> -
> > Are you sure sec_uart1 should be placed under the dma_bus? Please double
> > check. If sec_uart1 and other peripherals supported by the secure DMA
> > (base address: 0xF0600000) share the same address mapping as dma_bus, and
> > if they can be accessed by the linux kernel in some cases (as saying
> > 'reserved'), then that makes sense. If not, better not move them.
>
> Hi Guodong,
>
> I have confirmed with SpacemiT that sec_uart1 uses dram_range4, a.k.a.
> dma-bus, which is same as the rest of the UARTs.
>
> Also, sec_uart1 is usable in e.g. Linux, but only if no TEE is in use.
> Using status = "reserved" is the safe choice here. Platforms that do not
> run a TEE (or anything similar that would disable access to the
> 0xf000_0000 to 0xffff_ffff range) and wishing to enable use of sec_uart1
> can change the status to "okay".
>

Ok, with that confirmed, I'd say this patch looks good to me.

Reviewed-by: Guodong Xu <guodong@riscstar.com>

Thanks.

> Vivian "dramforever" Wang
>

Re: [PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses for K1

[Yixun Lan]

On 18:04 Mon 23 Jun     , Vivian Wang wrote:
> The SpacemiT K1 has various static translations of DMA accesses. This
> series adds all the DMA translation bus nodes and also moves existing
> nodes as necessary.
> 
> According to SpacemiT DT maintainer Yixun Lan [1], it's preferable from
> a SoC DT maintainer's perspective to have this done at once instead of
> spreading these changes into various driver series. Once this is merged,
> life will be easier for future users of the buses.
> 
> This series contains no bindings changes.
> 
> Patch 3 moves the eMMC node added in [1].
> 
> These patches can also be pulled from:
> 
> https://github.com/dramforever/linux/tree/k1/dma-ranges/v1
> 
> [1]: https://lore.kernel.org/r/20250623070147-GYA193822@gentoo
> [2]: https://lore.kernel.org/r/20250523-22-k1-sdhci-v1-1-6e0adddf7494@gentoo.org
> 

Hi Krzysztof,

  Just want to clarify, I believe you previous concern about the
"children of simple-bus are supposed to have unit addresses" [3] isn't
really an issue any more.. but, please let me know if I'm wrong..


Hi Vivian,

  We'd like to push this series for v6.17, so I've queued it at
k1/dt-for-next branch of SpacemiT SoC tree [4] for now, FYI.

Link: https://lore.kernel.org/all/2dc8ab35-4f58-49d3-8e8b-3e463fa592ae@kernel.org/ [3]
Link: https://github.com/spacemit-com/linux/tree/k1/dt-for-next [4]

Thanks all
-- 
Yixun Lan (dlan)

Re: [PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses for K1

[Vivian Wang]

On 7/9/25 14:40, Yixun Lan wrote:
> [...]
>
> Hi Vivian,
>
>    We'd like to push this series for v6.17, so I've queued it at
> k1/dt-for-next branch of SpacemiT SoC tree [4] for now, FYI.

Thanks, the DTS changes look good to me.

One oddity I noticed is that there's a pinctrl in the middle of the list 
of pwm*, but that is indeed correctly sorted by address, and the 
addresses seems to be correct. So, not a problem.

Vivian "dramforever" Wang

> Link: https://lore.kernel.org/all/2dc8ab35-4f58-49d3-8e8b-3e463fa592ae@kernel.org/ [3]
> Link: https://github.com/spacemit-com/linux/tree/k1/dt-for-next [4]
>
> Thanks all