From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Ard Biesheuvel <ardb@kernel.org>,
"Paul E. McKenney" <paulmck@kernel.org>,
Josh Poimboeuf <jpoimboe@kernel.org>,
Xiongwei Song <xiongwei.song@windriver.com>,
Xin Li <xin3.li@intel.com>,
"Mike Rapoport (IBM)" <rppt@kernel.org>,
Brijesh Singh <brijesh.singh@amd.com>,
Michael Roth <michael.roth@amd.com>,
Tony Luck <tony.luck@intel.com>,
Alexey Kardashevskiy <aik@amd.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Sohil Mehta <sohil.mehta@intel.com>,
Ingo Molnar <mingo@kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Daniel Sneddon <daniel.sneddon@linux.intel.com>,
Kai Huang <kai.huang@intel.com>,
Sandipan Das <sandipan.das@amd.com>,
Breno Leitao <leitao@debian.org>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Alexei Starovoitov <ast@kernel.org>, Hou Tao <houtao1@huawei.com>,
Juergen Gross <jgross@suse.com>,
Vegard Nossum <vegard.nossum@oracle.com>,
Kees Cook <kees@kernel.org>, Eric Biggers <ebiggers@google.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
"Masami Hiramatsu (Google)" <mhiramat@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Luis Chamberlain <mcgrof@kernel.org>,
Yuntao Wang <ytcoode@gmail.com>,
Rasmus Villemoes <linux@rasmusvillemoes.dk>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Tejun Heo <tj@kernel.org>, Changbin Du <changbin.du@huawei.com>,
Huang Shijie <shijie@os.amperecomputing.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Namhyung Kim <namhyung@kernel.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-efi@vger.kernel.org, linux-mm@kvack.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv7 11/16] x86/cpu: Set LASS CR4 bit as pinning sensitive
Date: Wed, 25 Jun 2025 15:51:04 +0300 [thread overview]
Message-ID: <20250625125112.3943745-13-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20250625125112.3943745-1-kirill.shutemov@linux.intel.com>
From: Yian Chen <yian.chen@intel.com>
Security features such as LASS are not expected to be disabled once
initialized. Add LASS to the CR4 pinned mask.
Signed-off-by: Yian Chen <yian.chen@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/kernel/cpu/common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 9918121e0adc..1552c7510380 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -403,7 +403,8 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c)
/* These bits should not change their value after CPU init is finished. */
static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
- X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED;
+ X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED |
+ X86_CR4_LASS;
static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning);
static unsigned long cr4_pinned_bits __ro_after_init;
--
2.47.2
next prev parent reply other threads:[~2025-06-25 12:51 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 12:50 [PATCHv7 00/16] x86: Enable Linear Address Space Separation support Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 01/16] x86/cpu: Enumerate the LASS feature bits Kirill A. Shutemov
2025-06-26 15:22 ` Borislav Petkov
2025-06-26 18:00 ` Xin Li
2025-06-25 12:50 ` [PATCH] x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscall Kirill A. Shutemov
2025-06-25 12:55 ` Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 02/16] x86/asm: Introduce inline memcpy and memset Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 03/16] x86/alternatives: Disable LASS when patching kernel alternatives Kirill A. Shutemov
2025-06-26 13:49 ` Peter Zijlstra
2025-06-26 14:18 ` Dave Hansen
2025-06-27 10:27 ` Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 04/16] x86/cpu: Defer CR pinning setup until after EFI initialization Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 05/16] efi: Disable LASS around set_virtual_address_map() EFI call Kirill A. Shutemov
2025-06-25 12:50 ` [PATCHv7 06/16] x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscall Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 07/16] x86/vsyscall: Reorganize the #PF emulation code Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 08/16] x86/traps: Consolidate user fixups in exc_general_protection() Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 09/16] x86/vsyscall: Add vsyscall emulation for #GP Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 10/16] x86/vsyscall: Disable LASS if vsyscall mode is set to EMULATE Kirill A. Shutemov
2025-06-25 12:51 ` Kirill A. Shutemov [this message]
2025-06-25 12:51 ` [PATCHv7 12/16] x86/traps: Communicate a LASS violation in #GP message Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 13/16] x86/traps: Handle LASS thrown #SS Kirill A. Shutemov
2025-06-26 17:57 ` Xin Li
2025-06-27 10:31 ` Kirill A. Shutemov
2025-06-30 8:30 ` David Laight
2025-06-30 9:50 ` Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 14/16] x86/cpu: Make LAM depend on LASS Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 15/16] x86/cpu: Enable LASS during CPU initialization Kirill A. Shutemov
2025-06-25 12:51 ` [PATCHv7 16/16] x86: Re-enable Linear Address Masking Kirill A. Shutemov
2025-06-26 9:22 ` [PATCHv7 00/16] x86: Enable Linear Address Space Separation support Vegard Nossum
2025-06-26 9:35 ` Vegard Nossum
2025-06-26 12:47 ` Kirill A. Shutemov
2025-06-26 13:15 ` Vegard Nossum
2025-06-29 11:40 ` David Laight
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