From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4145A273D8E; Wed, 9 Jul 2025 07:08:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752044909; cv=none; b=AUhDdj+oDab2csaRC0s0vuCc/AhERK7zLE+FPlND4u3Ig5KrYjrkk07u3+NSVXTIJuzx9J1lBfMEGA94rvGWhuZpt71GefxYMuK+37CsTGZkLvyY84Yts+68eYmbJAkfJ9QW5gs6xu/xegX23Q2mSwm60V1jlvud4CwwMFO6uEU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752044909; c=relaxed/simple; bh=0LtjXvqsRruXDJtU07Ulf5ytfTnCk8K7EwtmbcFBh/M=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SNlvZ7HL1/OLPRvmL+RCVtx2hnZ7WpHt5P5IfSMuELD0DtYjFuGEupRxFP140fRHyQKYUOvBPe+F1x/4SvBbOnS9nDw8gZHZ5rlJOVVBj2buxayuCvYXqLPKOHEFF+MvP4qiVviZkBHfptomYNj6wVXVAZJD67UsHkLcjJmL5mU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 9 Jul 2025 15:08:10 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 9 Jul 2025 15:08:10 +0800 From: Jacky Chou To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [net-next v4 4/4] net: ftgmac100: Add optional reset control for RMII mode on Aspeed SoCs Date: Wed, 9 Jul 2025 15:08:09 +0800 Message-ID: <20250709070809.2560688-5-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250709070809.2560688-1-jacky_chou@aspeedtech.com> References: <20250709070809.2560688-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain On Aspeed SoCs, the internal MAC reset is insufficient to fully reset the RMII interface; only the SoC-level reset line can properly reset the RMII logic. This patch adds support for an optional "resets" property in the device tree, allowing the driver to assert and deassert the SoC reset line when operating in RMII mode. This ensures the MAC and RMII interface are correctly reset and initialized. Signed-off-by: Jacky Chou --- drivers/net/ethernet/faraday/ftgmac100.c | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c index a98d5af3f9e3..05b8e3743a79 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include #include #include #include @@ -101,6 +102,8 @@ struct ftgmac100 { /* AST2500/AST2600 RMII ref clock gate */ struct clk *rclk; + /* Aspeed reset control */ + struct reset_control *rst; /* Link management */ int cur_speed; @@ -148,6 +151,23 @@ static int ftgmac100_reset_and_config_mac(struct ftgmac100 *priv) { u32 maccr = 0; + /* Aspeed RMII needs SCU reset to clear status */ + if (priv->is_aspeed && priv->netdev->phydev->interface == PHY_INTERFACE_MODE_RMII) { + int err; + + err = reset_control_assert(priv->rst); + if (err) { + dev_err(priv->dev, "Failed to reset mac (%d)\n", err); + return err; + } + usleep_range(10000, 20000); + err = reset_control_deassert(priv->rst); + if (err) { + dev_err(priv->dev, "Failed to deassert mac reset (%d)\n", err); + return err; + } + } + switch (priv->cur_speed) { case SPEED_10: case 0: /* no link */ @@ -1968,6 +1988,12 @@ static int ftgmac100_probe(struct platform_device *pdev) } + priv->rst = devm_reset_control_get_optional_exclusive(priv->dev, NULL); + if (IS_ERR(priv->rst)) { + err = PTR_ERR(priv->rst); + goto err_phy_connect; + } + if (priv->is_aspeed) { err = ftgmac100_setup_clk(priv); if (err) -- 2.34.1